Stacked module package

Details Stacked module package Stacked module package

2001-09-26

2004-05-11

Pham, Long (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

C257S723000, C257S777000, C257S779000, C257S659000, C257S773000

Reexamination Certificate

active

06734539

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to fabrication of semiconductor integrated circuit (IC) devices, and more specifically to fabrication of stacked multi-chip modules (MCMs) containing both RF and digital MCMs.
BACKGROUND OF THE INVENTION
In a continuing effort to reduce the size of IC packages, proposals for stacking IC chips, and stacking IC chip modules, have emerged in the IC packaging and IC integration technologies. See for example, U.S. Pat. No. 6,222,265. In many of these proposals, the IC devices that are combined in various stacked arrangements are digital IC circuits. Included in the more recent ones, are proposals for integrating both digital and memory chips in a single package, where the memory chip(s) is stacked on the logic chip(s) or vice versa. A wide variety of combinations have been proposed. However to date, combining RF chips and digital chips in a tightly packed, stacked arrangement has been avoided. This is due to the sensitivity of the RF chip or module to noise interference from other IC devices. To avoid this signal interference, RF chips are typically isolated physically from digital chips. They may be mounted on the same motherboard, but usually occupy a separate space on the board.
Stacked arrangements combining RF and digital IC chips would be desirable from the standpoint of miniaturization, but have been avoided due to the problem just outlined. It would be especially desirable to have packages with stacked RF and digital MCMs.
Statement of the Invention
We have developed a stacked MCM package in which both RF and digital MCMs are stacked together. The I/Os in the RF MCM are isolated from the digital MCM by routing dedicated RF I/O interconnections straight through the digital MCM. These I/O interconnections, termed here Passive Through Interconnections (PTIs), comprise solder bumps (alternatively solder balls) in the stacked module package, and a through hole interconnection through the intermediate substrate, typically through the digital MCM substrate. An RF shield is provided for the RF MCM using a ground plane in the RF MCM board, preferably a dedicated ground plane, and a metal shield over the top of the RF MCM. Antenna connections to the RF MCM may be provided using a PTI, and the solder bumps in the gap between MCM substrates in the stack may be shielded using a Faraday cage. Advantageously, the Faraday cage comprises an array of passive solder bumps surrounding the RF solder bump conductors. The passive solder bumps are tied to a common ground to effect the shield. The common ground is preferably a dedicated RF ground made using a PTI.
The preferred implementation of the invention uses stacked Ball Grid Array (BGA) boards. However, the principles of the invention are also applicable to leaded and pin grid array packages.


REFERENCES:
patent: 5786986 (1998-07-01), Bregman et al.
patent: 5955789 (1999-09-01), Vendramin
patent: 5994166 (1999-11-01), Akram et al.
patent: 6232667 (2001-05-01), Hultmark et al.

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