Stacked memory cell structure and method of forming such a...

Details Stacked memory cell structure and method of forming such a... Stacked memory cell structure and method of forming such a...

2011-07-12

2011-07-12

Nguyen, Viet Q (Department: 2827)

Static information storage and retrieval

Interconnection arrangements

C365S214000, C365S230030, C365S173000

Reexamination Certificate

active

07978491

ABSTRACT:
This invention relates to memory technology and new variations on memory array architecture to incorporate certain advantages from both cross-point and 1T-1Cell architectures. The fast read-time and higher signal-to-noise ratio of the 1T-1Cell architecture and the higher packing density of the cross-point architecture are both exploited by combining certain characteristics of these layouts. A single access transistor16is used to read multiple memory cells, which can be stacked vertically above one another in a plurality of memory array layers arranged in a “Z” axis direction.

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