Stacked memory and manufacturing method thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

Reexamination Certificate

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Details

C257S692000, C257S673000, C257S693000, C257S698000, C257S696000, C257S737000

Reexamination Certificate

active

07145227

ABSTRACT:
To mount a TSOP on an interposer substrate, leads provided to the TSOP are joined to pads of the interposer substrate by a thermosetting conductive resin, and the TSOP exclusive of the leads is joined to ground layers formed in the interposer substrate by a thermosetting conductive resin. The interposer substrates with the TSOPs mounted thereon are stacked in eight layers in such a manner that the TSOPs face downward. Then, leads of the upper interposer substrate are joined to pads formed in the rear face of the lower interposer substrate by a thermosetting conductive resin, so that the interposer substrates adjacent in a vertical direction are connected.

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patent: 2002-009227 (2002-01-01), None
patent: WO 99/65062 (1999-12-01), None
patent: WO 01/06562 (2001-01-01), None

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