Stacked integrated circuit package system with intra-stack...

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support

Reexamination Certificate

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Details

C257S686000, C257S777000, C257SE25006, C257SE25013, C257SE25021, C257SE25027, C257SE23085

Reexamination Certificate

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07871861

ABSTRACT:
A stacked integrated circuit package system includes: mounting a first integrated circuit over a first carrier; mounting a second integrated circuit package system having a second carrier with an intra-stack interconnect attached thereto and with the intra-stack interconnect over the first carrier and the first integrated circuit; and forming an intra-stack encapsulation between the first carrier and the second carrier surrounding the intra-stack interconnect.

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patent: 7217993 (2007-05-01), Nishimura
patent: 2008/0169544 (2008-07-01), Tanaka et al.

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