Stacked integrated circuit package-in-package system

Details Stacked integrated circuit package-in-package system Stacked integrated circuit package-in-package system

2008-05-06

2008-05-06

Chambliss, Alonzo (Department: 2814)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Assembly of plural semiconductive substrates each possessing...

C438S125000, C438S126000, C257S686000, C257S687000, C257S698000, C257S784000, C361S790000, C361S792000

Reexamination Certificate

active

07368319

ABSTRACT:
A stacked integrated circuit package-in-package system is provided forming a first integrated circuit package having a first encapsulation and a second integrated circuit package having a second encapsulation, stacking the first integrated package below the second integrated circuit package with the first encapsulation attached to the second encapsulation, forming a substrate having an opening from a substrate top surface to a substrate bottom surface, mounting the first integrated circuit package over the substrate top surface, electrically connecting the first integrated circuit package and the substrate bottom surface through the opening, and electrically connecting the second integrated circuit package and the substrate top surface.

REFERENCES:
patent: 6605875 (2003-08-01), Eskildsen
patent: 6847104 (2005-01-01), Huang et al.
patent: 6946323 (2005-09-01), Heo
patent: 6972481 (2005-12-01), Karnezos
patent: 6998721 (2006-02-01), Zhou
patent: 7259451 (2007-08-01), Seng et al.
patent: 2006/0027841 (2006-02-01), Tamaki
patent: 2007/0018303 (2007-01-01), Lee

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