Stacked differentially driven transmission line on integrated ci

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307443, 333238, 333246, 357 51, 357 68, H01L 2352, H01P 308, H01P 318

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active

046268898

ABSTRACT:
A semiconductor integrated circuit structure including a semiconductor substrate having a large area adapted for a large scale integration, a circuit formed in the substrate for generating a pair of complementary signals, a pair of common potential level layers with an electrically insulating layer interposed therebetween, the common potential level layers being formed above and being electrically insulated from the substrate, and a pair of electric conductor pattern layers formed in the insulating layer for conducting the pair of complementary signals. The electric conductor pattern layers are arranged so as to be overlapped with each other in a direction substantially perpendicular to the large area substrate and so as to be substantially parallel with the large area substrate. The overall length of the electric conductor pattern layers is such that when an electric signal is conducted through an electric conductor in an IC having a length equal to the above-mentioned overall length, attenuation of the signal thereby is not negligible.

REFERENCES:
patent: 3329835 (1967-07-01), D'Agostino
patent: 3543198 (1970-11-01), Stopper
patent: 3723761 (1973-03-01), Masaki
patent: 3742468 (1973-06-01), Lode
patent: 4383227 (1983-05-01), de Ronde
patent: 4412335 (1983-10-01), Froment et al.
Seki et al, IECE (Japan) General Meeting S3-3, 1982, pp. 2-231 to 2-232.
Lewis, Proceedings 29th Electronic Components Conference (IEEE, May 1979), pp. 85-93.
Howe, Jr., Stripline Circuit Design (Artech House, Dedham, Mass., 1974), pp. 111-151 (Chapter 4).

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