Stacked die semiconductor package

Details Stacked die semiconductor package Stacked die semiconductor package

2007-10-09

2007-10-09

Louie, Wai-Sing (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Chip mounted on chip

C257S772000, C257S779000, C257S781000

Reexamination Certificate

active

11321669

ABSTRACT:
In one embodiment, the present invention includes a semiconductor package including a first semiconductor die with first active circuitry and a second semiconductor die with second active circuitry. An intermediate substrate may be located in the package between the first and second semiconductor dies to provide power to at least one of the dies. In this way, improved stacking within a single package is afforded. Other embodiments are described and claimed.

REFERENCES:
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patent: 6255899 (2001-07-01), Bertin et al.
patent: 6294406 (2001-09-01), Bertin et al.
patent: 6600222 (2003-07-01), Levardo
patent: 6645832 (2003-11-01), Kim et al.
patent: 6657275 (2003-12-01), Chung et al.
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patent: 6924551 (2005-08-01), Rumer et al.
patent: 6927097 (2005-08-01), Dunlap
patent: 6946384 (2005-09-01), Kloster et al.
patent: 2003/0143971 (2003-07-01), Hongo et al.
patent: 2004/0084771 (2004-05-01), Bolken et al.

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