Stacked die package

Details Stacked die package Stacked die package

2008-01-15

2009-06-09

Clark, Jasmine J (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Chip mounted on chip

C257S686000, C257S723000, C257SE25005, C257SE25006, C257SE25021, C257SE25027, C257SE23085

Reexamination Certificate

active

07545048

ABSTRACT:
A stacked die package includes a substrate or interposer board that includes a contact area on a top surface and landing pads surrounding the contact area. Solder pads are disposed on an opposite side of the substrate. The solder pads are electrically connected with the landing pads by inner board wiring. A reconstituted die, which includes a die surrounded by a frame, is mounted over the substrate. A top die is mounted over the reconstituted die. Both the reconstituted die and the top die are electrically connected to the substrate, e.g., by wire bonds.

REFERENCES:
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patent: 5495398 (1996-02-01), Takiar et al.
patent: 5502289 (1996-03-01), Takiar et al.
patent: 6861761 (2005-03-01), Yang et al.
patent: 7026709 (2006-04-01), Tsai et al.
patent: 7189593 (2007-03-01), Lee
patent: 2003/0015803 (2003-01-01), Prietzsch
patent: 2003/0038374 (2003-02-01), Shim et al.
patent: 2004/0051170 (2004-03-01), Kawakami et al.
patent: 2004/0227250 (2004-11-01), Bolken et al.
patent: 0 575 051 (1993-12-01), None

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