Stacked configuration for integrated circuit devices

Details Stacked configuration for integrated circuit devices Stacked configuration for integrated circuit devices

1990-10-29

1992-05-26

James, Andrew J.

Electricity: electrical systems and devices

Safety and protection of systems and devices

With specific current responsive fault sensor

357 80, 357 78, 357 79, 361398, H05K 720, H05K 330, H05K 104

Patent

active

051172828

ABSTRACT:
A stacked packaging assembly for a plurality of integrated circuit devices employs a web of flexible interconnect material folded into a `layered` arrangement of parallel web fingers onto which a plurality of integrated circuit devices are surface-mounted. The leads of the integrated circuit devices are attached to interconnect links of the flexible interconnect web. A plurality of heat sink plates are interleaved with the folded web fingers of the stack, so as to engage the integrated circuit devices mounted on the web fingers. The heat sink plates are retained by thermally conductive spacer blocks along their edges. The spacer blocks are clamped together in a compact laminate structure, so as to form a rigid support which relieves mechanical stresses at the folds of the web fingers.

REFERENCES:
patent: 3152288 (1964-10-01), Mittler
patent: 3505570 (1970-04-01), Sprude et al.
patent: 3766439 (1973-10-01), Isaacson
patent: 3819989 (1974-06-01), Braune
patent: 3873889 (1975-03-01), Leyba
patent: 3971127 (1976-07-01), Giguere et al.
patent: 4781601 (1988-11-01), Kuhl et al.
patent: 4970579 (1990-11-01), Arldt et al.

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