Stacked chip process carrier

Metal fusion bonding – Including means to force or clamp work portions together... – Work portion comprises electrical component

Reexamination Certificate

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Details

C228S049100, C228S212000, C029S281500, C269S270000

Reexamination Certificate

active

06213376

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to workpieces and manufacturing methods used during soldering procedures. More particularly the invention addresses a method and apparatus to hold in proper alignment two or more semiconductor devices insuring the bonding operation.
2. Discussion of the Prior Art
Processes for direct chip attachment (DCA) of semiconductor IC's to substrates are known, and are being used extensively in the industry. A key feature of the technique is the fabrication of minute solder balls or “Bumps” on the semiconductor die with a process similar to that described in U.S. Pat. Nos. 3,401,126 and 3,429,0401 known as C4 for Controlled Collapse Chip Connection. Attaching the “bumped” die to a suitable substrate is achieved by applying a flux to either the die or substrate surface, aligning the two components usually with optical image recognition systems, placement to achieve contact, and reflow, which is the joining of the interconnect is a high temperature furnace.
Currently, in the push to achieve ever-higher integration levels, there is impetus to use C4 interconnection directly between two or more semiconductor die to create a stacked component which is then mounted onto a suitable carrier such as a substrate using wirebonds. Such an assembly would fulfill a long standing need of merging many different semiconductor technologies (i.e. LOGIC, DRAM, BICMOS, SiGe, GaAs) together easily while allowing extremely high bandwidth between the individual die owing to the high density and low capacitance loading of die-to-die C4 interconnects. However, the conventional C4 joining process described above poses problems when applied to the direct joining of individual dies. In the conventional die-to-substrate attach procedure, the substrate is always larger, and typically very much larger, than the die. This size difference facilitates the application of flux since it can be easily applied only to the region where the die will attach, and does not cover other surfaces which would cause it to stick to the process fixturing. In contrast, for die-to-die attachment, both components are generally small and close to the same physical size which makes it difficult to contain the flux to only the joining surface during apply and reflow. Furthermore, if flux is used in the die-to-die attach procedure, it usually will cover the metal pads used for wirebond connections later in the assembly process. Since flux is difficult to clean without leaving some trace residuals, problems with the wirebond connection may result. Finally, stacked die configurations are envisioned where a smaller die straddles two or more larger die. The relatively loose placement tolerances of the substrate in the die-to-substrate attach procedure would preclude its successful application to die-to-die attachment. The present widely used methods for the direct chip attachment (DCA) of semiconductor IC's to substrates are inconvenient, costly and time consuming and do not not adequately address present requirements. It would therefore be extremely advantageous to provide a simple cost effective solution which achieves the aforestated objectives.
SUMMARY OF THE INVENTION
The object of the present invention is to provide an apparatus that eliminates or reduces disadvantages associated with conventional holding apparatus.
Another object of the present invention is to provide an apparatus having reasonable manufacturing costs.
Yet another object of the present invention is to provide an apparatus for aligning two or more discrete semiconductor devices without the need for fixturing tools for alignment.
A still further object of the present invention is to provide an apparatus that does not put pressure or stress on the semiconductor devices to be bonded.
Yet another object of the present invention is to provide a method that does not require flux or the complications of flux processing.
A further object of the present invention is to provide an apparatus that allows for any shape of chip (die) to be bonded without the need for a chip carrier designed for each chip set size variation.
These and other objects of the present invention are achieved by a stacked chip process and apparatus that holds in proper alignment two or more semiconductor devices of different sizes for the purpose of solder bonding. The apparatus contains two slots, a bottom slot machined to accept a wide range of smaller semiconductor devices, and a topslot machined to accept a wide range of larger semiconductor devices, where the top slot is larger than and coincident with the bottom slot. A smaller die is placed in the holder on its vertical face, aligned to at least two sides of the apparatus. A larger die is placed face down over the smaller die in the top slot. Either die may have the solder bumps predefined on it, whereas the opposite die has the metal pads and possibly even a small amount of solder. The apparatus is then place into an anneal flow cycle.


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