Stacked capacitor SRAM cell

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...

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Details

257306, 257904, H01L 2711

Patent

active

053249615

ABSTRACT:
This is an SRAM cell and the cell can comprise: two NMOS drive transistors; two PMOS load transistors; first and second bottom capacitor plates 50,52, with the first plate 50 being over a gate 34 of one of the drive transistors and the second plate 52 being over a gate 40 of another of the drive transistors; a layer of dielectric material 68 over the first and second bottom capacitor plates; and first and second top capacitor plates 20, 26 , over the dielectric layer, with the first top capacitor 20 plate forming a gate of one of the load transistors and with the second top capacitor plate 26 forming a gate of another of the load transistors whereby the capacitor plates form two cross-coupled capacitors between the gates of the drive transistors and the stability of the cell is enhanced. This is also a method of forming an SRAM cell.

REFERENCES:
patent: 4679171 (1987-07-01), Logwood et al.
patent: 4970564 (1990-11-01), Kimura et al.
patent: 4984200 (1991-01-01), Saitoo et al.
patent: 5194749 (1993-03-01), Meguro et al.

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