Stacked capacitor for semiconductor memory device

Details Stacked capacitor for semiconductor memory device Stacked capacitor for semiconductor memory device

1989-06-09

1991-09-10

James, Andrew J.

357 49, 357 59, 357 68, H01L 2968, H01L 2978

Patent

active

050478176

ABSTRACT:
A semiconductor memory device according to the present invention comprises a memory cell having one transistor and one stacked capacitor. The stacked capacitor is stacked on the surface of a semiconductor substrate. Further, the stacked capacitor has a structure extending on a gate electrode and a word line through an insulating layer. A lower electrode layer of the capacitor has various concave/convex shapes, i.e. step portions and projecting portions formed on the surface thereof. These shapes are made by employing various etching processes. The lower electrode layer has such various concave/convex shapes formed thereon, so that a surface area and capacitance of the capacitor can be increased.

REFERENCES:
patent: 4742018 (1988-05-01), Kimura et al.
patent: 4754313 (1988-06-01), Takemae et al.

Affiliated with

Also associated with

Rating

Stacked capacitor for semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Stacked capacitor for semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Stacked capacitor for semiconductor memory device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-543650