Stacked ball grid array

Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement

Reexamination Certificate

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Details

C174S262000, C361S760000, C361S803000, C257S698000, C257S738000, C257S778000

Reexamination Certificate

active

06657134

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates in general to the packaging of integrated circuits and more specifically to ball grid array (BGA) packages. In particular, this invention relates to the use of an interposer and may be referred to as a ball grid array package or a stacked ball grid array.
The emphasis on reduction in the physical size of electronic components and the increase in complexity results in a continuing need for integrated circuit packaging that will accommodate the smaller footprint, higher lead count and improved electrical and thermal performance needs. Ball grid array packages have been used to meet the need for integrated circuit packages having higher lead counts and smaller footprints. A BGA package is typically a square package which houses conductors which bring the chip connections to an external surface where they terminate in connection pads. Solder balls are located between the package pads and corresponding pads on a printed circuit board (PCB) and the solder balls are reflowed to form a permanent electrical connection.
Ceramic packages are typically used in high performance, high reliability integrated circuit packaging. Such packages must perform when subjected to hundreds or thousands of thermal cycles as part of reliability testing. The materials include silicon having a temperature coefficient of expansion (TCE) in the range of 2.5-4 ppm/degree C., ceramic having a TCE of approximately 7 ppm/degree C., and the PCB having a TCE in the range of about 12-25 ppm/degree C. A major issue with such BGA packages is the ability of these packages to withstand thermal cycling when attached to a PCB. During thermal cycling, the solder joints tend to fatigue at the package interface or the PCB interface because of the strain caused by the TCE mismatch between the ceramic package and the PCB. In the past, various approaches have been used to attempt to improve the performance of the package when it is subjected to thermal cycling. In one approach, it has been proposed that a flexible substrate is located between the package and the PCB with a BGA on the package side being offset from a BGA on the PCB side so that there is some open space between the edges of electrically connected solder balls. Balls on each side of the substrate are connected by traces on one surface of the substrate and by vias through the substrate. The offset supposedly allows the flexible substrate to warp during thermal cycling and absorb the stress caused by TCE mismatch. The substrate with the offset between corresponding solder balls and the traces on both surfaces is expensive to fabricate. Further, in many high lead count packages the ability of the packaging to thermally conduct heat from the package into the printed wiring board is a significant issue. The use of the traces on the flexible substrate is believed to offer significantly more thermal resistance to the transfer of heat away from the package. In another approach, the proposed substrate is rigid and the BGAs on both sides of the substrate are aligned and connected by vias. The rigid substrate has holes formed in spaces between the vias to reduce the amount of material that interconnects the solder balls so that, according to this approach, the substrate tends to flex rather than transfer the TCE stress to the solder balls.
A typical solder joint which is barrel shaped is known to have a limited life due to the stress concentration at the interface between the solder connection and the substrate. It is known that changes in shape away from a spherical shape produce enhanced mechanical properties and testing has shown a greatly improved fatigue life for a connection having an hourglass shape. The stress concentration at the package and PCB interface with the connection is reduced by the hourglass shape of the connection. The stress is distributed more uniformly through the hourglass shape and not concentrated at the interface. Various approaches to change the shape of a solder joint including stretching the solder joint have been proposed.
In another approach, it has been proposed that a ceramic interposer be used to attach solder balls or columns to the LGA. The interposer is made out of alumina ceramic and has 90/10 Pb/Sn solder attached to it. The interposer is attached to the package with eutectic 63/37 Sn/Pb solder that is either printed on the package or provided with the interposer. This approach only uses a high temperature non-melting solder and does not accommodate a variety of solder balls and sizes. Also, since the solder column does not completely reflow, this method is not self-aligning. In addition, in some ceramic interposers the gap between the interposer and the LGA package is only about 4 mils, which makes flux clean up after soldering very difficult.
Thus, a need exists for a BGA package that will reduce the TCE stress during thermal cycling, provide excellent thermal performance and which can be easily fabricated.
SUMMARY
The present invention solves these and other needs by providing in a first aspect a ball grid array mounted circuit including a stress relief substrate having a top surface and a bottom surface with spaced conductive vias extending between the surfaces and pads at the surfaces capturing selected vias. First solder connections formed from solder balls connect between pads at the top surface and connection pads at an electronic component having a first thermal coefficient of expansion (TCE). Second solder connections formed from solder balls connect between pads at the bottom and connection pads at a printed circuit board (PCB) having a second TCE. The first and second solder connections absorb at least a portion of the stress due to differences between the first TCE and the second TCE. In a second aspect, connection pads at the electronic component and at the PCB are sized to be larger than connection pads at the top surface and the bottom surface so that solder connections have an hourglass shape and provide improved stress relief.


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