Stackable semiconductor package including laminate interposer

Details Stackable semiconductor package including laminate interposer Stackable semiconductor package including laminate interposer

2007-01-18

2010-11-09

Louie, Wai-Sing (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

Reexamination Certificate

active

07829990

ABSTRACT:
An interconnect structure (i.e., a laminate interposer) which is mounted to a semiconductor package leadframe or substrate prior to molding the package body of the semiconductor package. During the molding process, the top of the laminate interposer is protected such that the top surface of the interposer is exposed subsequent to the completion of the molding process. In this manner, electrical signals can be routed from the package leadframe or substrate to the top surface of the package body of the semiconductor package. Subsequently, a mating package can be mounted on top of the underlying package by way of a ball grid array (BGA) interconnect or other type of interconnect.

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