Stackable integrated circuit package system

Details Stackable integrated circuit package system Stackable integrated circuit package system

2006-02-27

2010-06-22

Smith, Bradley K (Department: 2894)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

C257S421000, C257S422000, C257S423000, C257S424000, C257S425000, C257S426000, C257S427000, C257S777000, C257SE25027

Reexamination Certificate

active

07741707

ABSTRACT:
A stackable integrated circuit package system is provided placing a first integrated circuit die having an interconnect provided thereon in a substrate having a cavity, encapsulating the first integrated circuit die, having the interconnect exposed, in the cavity and along a first side of the substrate, mounting a second integrated circuit die to the first integrated circuit die, and encapsulating the second integrated circuit die along a second side of the substrate.

REFERENCES:
patent: 5811132 (1998-09-01), Rho et al.
patent: 6731009 (2004-05-01), Jones et al.
patent: 6781243 (2004-08-01), Li et al.
patent: 6798057 (2004-09-01), Bolkin et al.
patent: 6977440 (2005-12-01), Pflughaupt et al.
patent: 6982488 (2006-01-01), Shin et al.
patent: 2004/0159955 (2004-08-01), Shen
patent: 2005/0287707 (2005-12-01), Lin et al.

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