Stack type flip-chip package

Details Stack type flip-chip package Stack type flip-chip package

2002-04-23

2004-07-27

Pham, Long (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

C257S778000, C257S777000, C257S685000, C257S723000

Reexamination Certificate

active

06768190

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application serial no. 91101229, filed Jan. 25, 2002.
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to a stack type flip-chip package. More particularly, the present invention relates to a stack type flip-chip package having redistribution lines on the back of chips to serve as bridges.
2. Description of Related Art
To form a flip-chip package, a silicon chip having an active surface with an array of bonding pads thereon is provided. Bumps are formed on each bonding pad so that the chip may flip over and attach to the contact points on a package carrier. In general, a flip-chip package occupies a small area and has a high packaging density. Moreover, direct electrical connection through bumps reduces signal transmission path. Therefore, flip-chip designs are employed in chip scale packages (CSP), ball grid array (BGA) packages and multi-chip module (MCM). Note that a number of chips each having a different function is enclosed within a single package for a multi-chip module. Hence, multi-chip module not only reduces packaging volume and area, but also shortens transmission path between chips. Ultimately, overall performance is improved.
To form a conventional multi-chip package, both flip-chip technique and chip stacking designs are employed so that two or more chips each having a different function are enclosed within a single package. As before, the advantages of combining flip-chip technique with a stacking design not only reduces packaging area and increases packing density, but also shortens signal transmission length and improves performance.
FIG. 1
is a schematic cross-sectional view of a conventional stack type flip-chip package. As shown in
FIG. 1
, the stack type flip-chip package
10
uses both the flip-chip technique and a stacking design such that an upper chip
14
and a lower chip
16
are packaged inside a substrate
12
. The upper chip
14
has a redistribution line
18
. The redistribution line
18
not only provides a bonding pad
20
for connecting with a contact pad
24
on the substrate
10
through a bump
22
, but also provides another bonding pad
26
for connecting with a bump
28
on the lower chip
16
. In addition, the bonding pad
26
also fans out to yet another bonding pad
30
. The bonding pad
30
connects with a contact pad
34
on the substrate
12
through a bump
32
so that the lower chip
16
and the substrate
12
are electrically connected. To accommodate the lower chip
16
, the substrate
12
has an opening (or cavity). The package also requires the injection of some underfilling material
38
. The underfilling material
38
fills up the space between the substrate
12
, the upper chip
14
and the lower chip
16
and protects the bumps, bonding pads and contact pads against shock and vibrations.
The aforementioned stack type flip-chip package design has the following drawbacks. The upper chip must provide sufficient number of bonding pads for connecting with the bumps on the lower chip. Hence, useful area on the upper chip is greatly reduced and bonding pad arrangement on the upper chip is severely limited. Moreover, the gaps between the substrate and the upper and lower chip on one hand and between the upper and lower chip on the other hand are small and unevenly distributed. Thus, filling up all the space within the package with underfill material is difficult.
SUMMARY OF THE INVENTION
Accordingly, one object of the present invention is to provide a multi-chip module having a stack type flip-chip design for accommodating two or more chips each having a different function inside a single package, thereby reducing overall production cost.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides a stack type flip-chip package. The package includes a substrate, a first chip, a second chip, some underfill material and some packaging material. One surface of the substrate has a plurality of bump contacts and a plurality of line contacts thereon. The first chip has an active surface with a plurality of first bonding pads thereon. The package further includes a redistribution circuit on the backside surface of the first chip. The redistribution circuit has a plurality of bump pads and a plurality of line pads thereon. The second chip has an active surface with a plurality of second bonding pads thereon. Second bumps are positioned between the bump contacts and the first bonding pads and between the bump pads and the second bonding pads. A plurality of conductive wires connects the line contacts and the line pads. The underfill material fills up the space between the first chip and the substrate and the gap between the first chip and the second chip. The packaging material encloses the first chip, the second chip and all the conductive wires.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.


REFERENCES:
patent: 5994166 (1999-11-01), Akram et al.
patent: 6404062 (2002-06-01), Taniguchi et al.
patent: 6563206 (2003-05-01), Kamikuri et al.
patent: 6577008 (2003-06-01), Lam et al.

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