Stack pointer control circuit

Details Stack pointer control circuit Stack pointer control circuit

1986-12-04

1989-02-21

Heckler, Thomas M.

Boots, shoes, and leggings

G06F 942

Patent

active

048071854

ABSTRACT:
In the conventional CPU, when an interruption occurs during execution of a stack control instruction, the interrupted stack control instruction is executed again beginning from the start, so that a stack memory address currently designated by the stack pointer does not match that corresponding to the start of the instruction execution, thus resulting in a program error. To overcome the above problem, at the start of information saving and/or return operation, a stack memory address stored in the first register so as to be read next is additionally stored in the second register. Although the above operation is executed on the basis of the stack memory address stored in the first register, in case an interrupt occurs, the stack memory address stored in the second register is set to the first register before executing again the interrupted stack control instruction.

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