Stack package with vertically formed heat sink

Details Stack package with vertically formed heat sink Stack package with vertically formed heat sink

2007-02-27

2008-09-30

Menz, Douglas M (Department: 2891)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With provision for cooling the housing or its contents

C257S718000, C257S686000

Reexamination Certificate

active

07429792

ABSTRACT:
A stack package includes a base substrate having connection pads on an upper surface thereof and ball lands on a lower surface thereof; at least two semiconductor chps stacked by intervening a spacer on the base substrate and defined with through-holes for electrical connections on positions corresponding to the connection pads; electrical connection members for electrically connecting the stacked semiconductor chips and the base substrate to each other; a pair of heat sinks formed such that they contact the side surfaces of the stacked semiconductor chips and extend in a direction perpendicular to the base substrate; and outside connection terminals attached to the ball lands located on the lower surface of the base substrate.

REFERENCES:
patent: 5818107 (1998-10-01), Pierson et al.
patent: 6569762 (2003-05-01), Kong
patent: 7369410 (2008-05-01), Chen et al.
patent: 1999-52644 (1999-09-01), None

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