Stack package and method of fabricating the same

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

Reexamination Certificate

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C438S126000, C438S109000, C257S784000, C257S788000, C257S686000, C257S703000, C257S738000

Reexamination Certificate

active

06222259

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a semiconductor package, and more particularly to the stack package that one package consists at least two semiconductor chips stacked therein.
2. Description of the Related Art
Rapid progress in the memory chip has been presented to increase memory capacity. Currently, 128 M DRAM is mass-produced, and also the mass-production of 256 M DRAM will be available sooner or later.
For increasing memory chip capacity, i.e. high integration, a technology for inserting cells as many as possible into a given area of semiconductor device, is widely known. However, this method requires high technology such as a precise line width and a considerable amount of time for development. Accordingly, a relatively simpler stacking technology to optimize integrity of the semiconductor device has been developed most recently.
The term “stacking” used in semiconductor industry means a technique to double the memory capacity by heaping up at least two semiconductor chips in a vertical direction. According to the stacking technique, a 128 M DRAM device can be constituted by two 64 M DRAM devices for instance, also a 256 M DRAM device can be constituted by two 128 M DRAM devices.
Merely an example of a package fabricated according to the typical stacking technique is illustrated in
FIGS. 1 and 2
.
As shown in
FIG. 1
, a lead frame
2
is attached by means of an adhesive
3
to a semiconductor chip
1
in which a bonding pad is disposed on an upper portion of the semiconductor chip
1
. An inner lead
21
of the lead frame
2
is connected to the bonding pad with a metal wire
3
. The entire resultant is sealed with a molding compound
5
such that both ends of an outer lead
22
of the lead frame
2
is exposed therefrom.
On the package as constituted above, another package having the same constitution as above is stacked. That is to say, the outer lead
22
of the package in the upper position is in contact with a midway portion of the lead frame
2
in the lower position thereby electrically connecting each other.
However, there is a drawback in the general stack package that total thickness of the package is too thick. Further, since an electrical signal should pass the lead frame of the lower package through the outer lead of the upper package, there is another drawback that the electrical signal path is too long. Especially, bad connections are occurred frequently due to bad soldering since leads of both upper and lower packages are joined with each other by soldering.
A conventional stack package to solve foregoing problems is illustrated in FIG.
2
.
As shown in the drawing, upper and lower semiconductor chips
1
a
,
1
b
are opposed with a selected distance. An inner lead
21
a
of an upper lead frame
2
a
is attached on the bottom surface of the upper semiconductor chip
1
a
, thereby electrically connecting to a bonding pad of the upper semiconductor chip
1
a
with a metal wire
4
a
. Further, an inner lead
21
b
of a lower lead frame
2
b
is attached on the top surface of the lower semiconductor chip
1
b
thereby electrically connecting to a bonding pad of the lower semiconductor chip
1
b
with a metal wire
4
b.
An outer lead
22
a
of the upper lead frame
1
a
is electrically bonded at a midway portion of the lower lead frame
2
a
by the laser and an outer lead
22
a
of the lower lead frame
2
b
is exposed from a molding compound
5
a.
However, the stack package as illustrated in
FIG. 2
incurs following shortcomings.
Although this type of stack package often shortens the electrical signal path, there may be occurred a signal interference during operation due to too short distance between the respective lead frames.
Furthermore, since the respective lead frames are opposed each other, there is a high probability of inferiority originated from the clearance between the lead frames. Since the respective lead frames are bonded by the laser, therefore an expensive laser equipment is required. Especially, as those lead frames are bonded semi-permanently, it is almost impossible to repair the device afterward. Further, when size of the chip is changed, it is required to manufacture new lead frames accordingly.
In addition to those shortcomings, an effective heat dissipation is not performed during operation since the respective semiconductor chips are positioned inside of the molding compound. That is, since there is no room for a heatsink for heat-dissipating function, the heat dissipation is performed inferiorly.
SUMMARY OF THE INVENTION
Therefore, the present invention is provided to solve the above-mentioned disadvantages and shortcomings.
It is one object of the present invention to provide a stack package capable of shortening signal transmittance path without increasing total thickness and also capable of preventing signal interference to the utmost, and to a method of manufacturing the same.
It is another object of the present invention to prevent inferiority due to the clearance between lead frames by excluding lead frames fundamentally. Also, there may be no need to remanufacture lead frames according to changes in the size of the semiconductor chips and it is also easy to repair afterward.
A stack package as to solve foregoing objects of the present invention comprises a ceramic capsule. A pair of protruding portions are formed at both upper sides of the ceramic capsule. A first semiconductor chip is attached on the upper face of the ceramic capsule and a second semiconductor chip is attached on a lower face of the ceramic capsule. The first and second semiconductor chips are disposed such that their bonding pads are disposed upwardly, more particularly the second semiconductor chip has a size that its bonding pad may be exposed from both sides of the ceramic capsule. It is preferable to attach a heatsink at the lower face of the second semiconductor chip. The respective bonding pads of the first and second semiconductor chips are electrically connected with a metal wire. A midway portion of the metal wire is laid on the protruding portion of the ceramic capsule. The entire resultant is encapsulated with a molding compound while exposing the portion of metal wire laid on the protruding portion and the heatsink. A conductive bump is formed on the exposed portion of the metal wire, and a solder ball is mounted on the conductive bump.
A method of manufacturing the stack package as constituted above is as follows.
A first semiconductor chip is attached on an upper face of a ceramic capsule in which a pair of protruding portions are formed at both upper sides, so that a bonding pad of the first semiconductor chip is positioned upwardly. A second semiconductor chip having enough size which can expose its bonding pad to both sides of the ceramic capsule, is attached on a lower face of the ceramic capsule so that the bonding pad of the second semiconductor chip is positioned upwardly. One end of a metal wire is electrically connected to the bonding pad of the first semiconductor chip and the other end of the metal wire is electrically connected over a protruding portion of the ceramic capsule to the bonding pad of the second semiconductor chip. The entire resultant is encapsulate with a molding compound while exposing the metal wire portion laid on the protruding portion of the ceramic capsule and bottom surface of the second semiconductor chip. A conductive bump is formed on the metal wire portion exposed from the molding compound. Afterward, a solder ball is mounted on the conductive bump.
According to the above construction of the present invention, for those reasons that first and second semiconductor chips are disposed with a ceramic capsule therebetween; the respective bonding pads are connected by metal wires rather than lead frames; and the solder ball is mounted on the metal wire portion exposed from the molding compound, there exists less probability of signal interference and it is easy to repair afterward since metal wires are easy to remove.


REFERENCES:
patent: 429518

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