Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate
2006-01-27
2010-02-23
Andújar, Leonardo (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Chip mounted on chip
C257S686000, C257SE23116
Reexamination Certificate
active
07667333
ABSTRACT:
A stack of semiconductor chips includes a substrate or an interposer board comprising conductor structures for electrical connection of the stack and a first chip. The first chip includes an active side with peripherally arranged bonding pads and is mounted face-up on the substrate or the interposer board. The stack beyond includes at least a further chip with peripherally arranged bonding pads on its active side. The back side and at least two chip edges of the further chip are embedded by a mold cap providing a protuberance on the back side of the chip. The protuberance forms a planar surface extending substantially parallel and with a distance to the back side of the chip. The further chip is attached face-up to the active side of the first chip by an adhesive applied between the protuberance and the first chip so that the protuberance is inserted between both chips to provide a gap there. The protuberance has at least one linear dimension that is smaller than a linear dimension of the subjacent chip.
REFERENCES:
patent: 6351028 (2002-02-01), Akram
patent: 2002/0121706 (2002-09-01), Tatsuta et al.
patent: 2003/0015803 (2003-01-01), Prietzsch
patent: 2004/0126910 (2004-07-01), Thomas et al.
patent: 2005/0012196 (2005-01-01), Akram
patent: 2006/0289970 (2006-12-01), Gogl et al.
Belonio Jesus Mennen
Singleton Laurence Edward
Wollanke Alexander
Andújar Leonardo
Infineon - Technologies AG
Slater & Matsil L.L.P.
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