Stack macro order optimizing method

Details Stack macro order optimizing method Stack macro order optimizing method

1993-11-02

1996-07-16

Trans, Vincent N.

Boots, shoes, and leggings

364489, G06F 1750

Patent

active

055373321

ABSTRACT:
An automated method for optimally ordering macros within a semiconductor chip data-path stack is disclosed. Each stack macro is assumed to have at least one predetermined bus connection with another macro in the stack. The ordering technique is based on minimizing for each macro in the stack the total number of stack macros passed by buses predeterminedly connected to that macro without making connection thereto. In addition, a macro group is formed of any subset of stack macros caught in a repeating loop. Each macro group contains at least two macros of the stack. Once defined, a macro group is treated as a single stack macro and optimization processing continues. Once the optimal location of all macros is identified, then any formed macro group is expanded and the optimal location of each macro within the group itself is identified. Specific details of the method are provided herein.

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