Stable rail sense amplifier in CMOS memories

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307475, 330277, 365189, H03K 519, G11C 706, G01R 19165, H03F 318

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045188793

ABSTRACT:
A stable sense rail amplifier for CMOS memories is provided allowing very small voltage swings at or very close to the power supply rail to be transformed into substantially rail-to-rail swings. The input of the amplifier is coupled to the output of memory cells which may be designed to have output swings of 200 millivolts or less. These output swings are shifted to approximately the center of the range between the supply voltage and ground. While the level shifting is performed a small amount of linear gain is added. Subsequently the shifted signal is applied to a linear high gain amplifier stage. The high gain amplifier has as its output a substantially rail-to-rail signal. The total delay from the input rail of the amplifier to the high gain inverting amplifier stage is limited to the transfer time of a single CMOS FET. The amplifier is self-biasing and self-referencing.

REFERENCES:
patent: 3560765 (1971-02-01), Kubinec
patent: 4103190 (1978-07-01), Beutler
patent: 4287570 (1981-09-01), Stark
patent: 4348601 (1982-09-01), Kitamura
patent: 4443718 (1984-04-01), Hagiwara et al.
Schanzer, "Read Voltage Supply for MNOS Memory Arrays;" RCA Technical Notes; TN No. : 1233, 10/26/79.

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