Stable and accurate CMOS level shifter

Details Stable and accurate CMOS level shifter Stable and accurate CMOS level shifter

2003-05-28

2004-09-07

Ton, My-Trang Nu (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Amplitude control

Reexamination Certificate

active

06788125

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field of level shifters for use in electronic circuitry. More specifically, the present invention provides an improved level shifter that is extremely stable and accurate.
2. Description of the Related Art
Advances in complimentary metal oxide semiconductor (CMOS) devices used in electronic circuitry, particularly digital circuitry used in microprocessors, have resulted in CMOS devices operating at lower and lower voltages. Unfortunately, input/output (I/O) circuits have not experienced a commensurate reduction in their operating voltages. I/O voltages are typically higher than core voltage, due to higher voltages required for noise immunity and technology lag of application-specific integrated circuit (ASIC) chips. For instance, in a microprocessor, the core CMOS circuits in many microprocessors are currently operating at 1.3V, while I/O CMOS circuits are operating between 1.5V and 2.5V.
Implementation of an interface between circuits operating at different voltages requires conversion of the signal voltage levels to ensure that the signals are compatible with each other and that static current drain is minimized. This voltage conversion function is accomplished by a “level shifter” circuit. In the lower voltage environment of current CMOS circuits, it is essential that the level shifter is extremely accurate and stable to ensure maximum performance for the I/O circuits and the microprocessor. Current CMOS level shifters, however, are not stable and require CMOS circuits to compensate for variations in voltage and current levels. These additional circuits require additional power and surface area on the integrated circuit. In addition, these circuits introduce complexity to the design and may, in certain circumstances, contribute to the instability of the level shifter.
For a level shifter to operate with the highest degree of stability and efficiency, it is essential to provide an extremely stable biasing source for the CMOS components in the level shifter. Specifically, it is very desirable for the biasing source to operate as an ideal current source. Existing designs utilize P-MOS devices as the principal component in the biasing source. P-MOS devices, however, are particularly susceptible to degradation resulting from the effects of negative bias temperature instability (NBTI). Over time, the operating characteristics of the P-MOS devices can degrade, leading to variation in the performance of the level shifter.
In view of the shortcomings of the prior art, there is a need for an improved stable and accurate level shifter for conversion of signal voltage levels, thereby ensuring maximum performance for both the I/O circuits and the microprocessor.
SUMMARY OF THE INVENTION
The method and apparatus of the present invention provides an improved level shifter that is accurate, stable and resistant to NBTI effects. In one embodiment of the invention, the level shifter comprises two legs having transistors operably connected in a source-follower configuration. The biasing of the level shifter is provided by a multistage biasing circuit that comprises a plurality of N-MOS devices. The biasing source can be operated with a single stage or can be configured to combine multiple stages to increase the current (voltage) provided by the biasing circuit.
In accordance with the present invention, a level shifter having first and second legs comprising a plurality of transistors is operated by receiving a first input signal at a first voltage level on a circuit of a first leg of said level shifter and, generating a first output signal at a second voltage level; receiving a second input signal at a second voltage level on a circuit of said second leg of said level shifter and generating a second output signal at a second voltage level; and controlling operation of said first and second legs of said level shifter with a substantially ideal current source operable to provide stable biasing of transistors in said first and second legs of said level shifter.
The level shifter of the present invention consumes less power and requires less area on an integrated circuit than prior level shifters. In addition, the level shifter is controlled by an extremely stable biasing source that is insensitive to NBTI effects, thereby allowing the level shifter to be highly reliable throughout the life of the part with minimal degradation in the performance and accuracy of the level shifter through time. Using the level shifter of the present invention it is possible to obtain more accurate data signals from the sense amplifier in the level shifter.


REFERENCES:
patent: 6236244 (2001-05-01), Depetro et al.
patent: 6331797 (2001-12-01), Lambert
patent: 6445622 (2002-09-01), Hirano
patent: 6566930 (2003-05-01), Sato
patent: 6600357 (2003-07-01), Kirihara
patent: 6677797 (2004-01-01), Kameyama et al.

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