Stabilized DC power supply device

Details Stabilized DC power supply device Stabilized DC power supply device

2001-11-13

2002-11-19

Nguyen, Matthew (Department: 2838)

Electric power conversion systems

Current conversion

With means to introduce or eliminate frequency components

C323S280000

Reexamination Certificate

active

06483727

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a stabilized DC (direct current) power supply device that supplies a stabilized DC voltage to a load.
2. Description of the Prior Art
A conventional stabilized DC power supply device as shown in
FIG. 4
is described hereinafter as an example. As shown in
FIG. 4
, a base, an emitter, and a collector of an NPN transistor
1
are connected to an output terminal of an operational amplifier
2
, an output terminal O, and a power supply voltage V
CC
respectively. At the same time, the emitter of the transistor
1
is connected to ground via resistors
3
and
4
, each of which has a large resistance and is connected in series so as to detect an output voltage V
OUT
(a voltage supplied to a load
100
) at the output terminal O. A DC voltage Vref is applied to a noninverting input terminal (positive input terminal) of the operational amplifier
2
. A node between the resistors
3
and
4
is connected to an inverting input terminal (negative input terminal) of the operational amplifier
2
.
In the circuit configuration as described above, a current I
OUT
is supplied from the power supply voltage V
CC
via the transistor
1
to the load
100
that is connected to the output terminal O. It can be assumed that the current I
OUT
passing through the load
100
is nearly equal to an emitter current I
E
passing through the transistor
1
because the resistors
3
and
4
have a large resistance. Therefore, if it is assumed that the load
100
has an impedance of Z, then the output voltage V
OUT
is given by
V
OUT
≈I
E
×Z
The emitter current I
E
of the transistor
1
is controlled by a control circuit
10
comprising the transistor
1
, operational amplifier
2
, resistors
3
and
4
, and connections arranged therein so that a voltage measured at the node between the resistors
3
and
4
becomes equal to the DC voltage Vref. As a result, the output voltage V
OUT
is stabilized at a constant voltage even if the power supply voltage V
CC
fluctuates in DC voltage or at an extremely low frequency.
Here, it is possible that the power supply voltage V
CC
fluctuates at a frequency ranging from approximately 10 Hz to 10 KHz due to noise or the like. However, the aforementioned conventional stabilized DC power supply device has a problem in which the output voltage V
OUT
fluctuates in phase with the power supply voltage V
CC
when the power supply voltage undulates at the aforementioned frequency. This is caused by the control circuit
10
not capable of controlling the emitter current I
E
of the transistor
1
in response to the frequency, thereby vibrating the emitter current I
E
accordingly. Consequently, if a ripple voltage arises in the power supply voltage V
CC
, a resulting ripple voltage also arises in the output voltage that can not be cancelled satisfactorily.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a stabilized DC power supply device having a high capability of removing a ripple voltage from an output voltage even if the ripple voltage arises in a power supply voltage.
To achieve the above object, according to one aspect of the present invention, a stabilized DC power supply device that maintains an output voltage thereof at a constant level despite a fluctuation arising in a power supply voltage fed thereto comprises a control circuit that compares the output voltage with a reference voltage so as to output a control signal by which the output voltage is maintained at a predetermined level, and a ripple cancellation circuit that amplifies an undulating component included in the power supply voltage at a predetermined gain and that feeds out a resulting signal as an undulation compensation signal for correcting the output voltage, wherein the undulation compensation signal for correcting the output voltage is superimposed on the reference voltage so as to prevent an undulation arising in the power supply voltage from appearing in the output voltage.
In this structure, the reference voltage of the control circuit that controls the output voltage is automatically compensated so that the output voltage can be maintained at a constant level if the power supply voltage fluctuates or even if the power supply voltage undulates at a higher frequency.


REFERENCES:
patent: 5589759 (1996-12-01), Borgato et al.
patent: 5850139 (1998-12-01), Edwards
patent: 6188211 (2001-02-01), Rincon-Mora et al.
patent: 6246221 (2001-06-01), Xi

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