Stability enhanced multistage power amplifier

Amplifiers – With semiconductor amplifying device – Including plural stages cascaded

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S329000, C257S331000, C330S277000, C330S307000, C330S311000

Reexamination Certificate

active

06583673

ABSTRACT:

FIELD OF INVENTION
The present invention pertains to high gain, high frequency radio frequency (RF) multistage power amplifiers, e.g., used in wireless communication systems.
BACKGROUND
Electronic power devices, for example power transistors, characteristically operate at high current and/or high voltage. These high currents and voltages require that unique considerations be given to the physical design of the devices and their integration into a system. In particular, the higher the power, the greater the affect of electrical lead elements, i.e., the inherent resistive and reactive characteristics of electrical wires and connections, on the performance of the device. For example, high currents carried by power devices may be directed to the common ground path and, thus, may impact the physical arrangement of the power devices to ensure proper grounding for correct circuit operation and circuit stability. In general, the lower the resistance of the electrical paths connecting the power devices to the reference ground terminal, the more accurate and stable the circuit operation.
For high gain, high frequency applications, laterally diffused metal oxide semiconductors (“LDMOS”) power transistors have been preferred for forming gain stages in multistage amplifiers. LDMOS transistors have their common element (source) terminal formed on the underside of the transistor die (or “chip”). As such, the transistor source terminals may be directly connected to a common reference lead (e.g., a layer of conductive metal such as gold) formed on a substrate (such as a tungsten or ceramic thermal sink) to which the transistor chip is attached by using known die attach techniques. The LDMOS transistor input (gate) and output (drain) terminals are located on the topside of the transistor chip, and are commonly connected to other circuit elements of the amplifier using bond wires.
In a multistage amplifier, the current flowing through the respective transistor sources is combined in the common reference lead, forming a “common lead current.” The common reference lead current path has inherent (parasitic) resistive and reactive elements, which impact on the stability and operational performance of a conventional multistage amplifier. Because of the relatively high common lead current, the inherent resistance and reactance of the common reference lead may substantially affect the operational performance and stability of a multistage amplifier, even though this inherent resistance and reactance of the common reference lead is relatively small.
The “sharing” of a common reference lead by sources of component transistors in multistage amplifiers leads to the problem of isolation degradation between gain stages. Over the years, the general trend has been to make electronic devices, such as cellular telephones, smaller and smaller. As the result, the stages of gain in multistage power amplifiers used in these electronic devices are also being moved closer and closer together. Combined with the presence of inherent resistive and reactive elements in the common reference lead, a feedback voltage results. Consequently, there is an overall isolation degradation between the gain stages of the multistage amplifier, resulting in instability and reduced operational performance.
For purposes of better illustration,
FIG. 1
illustrates a physical packaging of a conventional multistage amplifier
100
, employing LDMOS transistors for the respective gain stages, and also showing the common lead current paths.
FIG. 2
is a schematic illustration of amplifier
100
, showing the inherent resistance and inductive reactance of the common reference lead connecting the respective source terminals of the gain stage transistors to reference ground.
The amplifier
100
includes a thermally conductive substrate
140
used as both a heat sink and support structure. The substrate
140
is covered with an electrically conductive material, such as gold, forming an electrically conductive layer
130
. A pair of LDMOS power transistor chips
110
and
120
are directly attached to the electrically conductive layer
130
, with the respective underlying source terminals of the transistors are directly connected to the conductive layer
130
. The transistors
110
and
120
are electrically connected in cascade, with transistor
110
representing the first gain stage, and transistor
120
representing the second gain stage. Although transistors
110
and
120
are illustrated as single transistors, it will be understood by those skilled in the art that each transistor
110
and
120
may actually comprise of two or more physically separate power transistors operating in parallel.
The first gain stage transistor
110
has its top-side gate terminal connected to a gate lead
165
by one or more bond wires
170
. The gate lead
165
is attached to (or formed on) the substrate
140
, electrically isolated from the conductive layer
130
. The gate lead
165
is connected to a source generator
180
. The source generator
180
is external to the amplifier device
100
, and forms a circuit between the gate lead
165
and the chassis ground
150
. Resistance through the source generator
180
is represented by resistor
132
.
The top-side drain terminal of transistor
110
is connected to the top-side gate terminal of the second gain stage transistor
120
by one or more bond wires
174
. The top-side drain terminal of transistor
120
is connected to a drain lead
163
by one or more further bond wires
172
. The drain lead
163
is attached to (or formed on) the substrate
140
, electrically isolated from the conductive layer
130
. The drain lead
163
is connected to a load, shown as a resistor
182
. This resistor
182
is also external to the amplifier device
100
.
The underlying side of substrate
140
is attached to a ground plane, e.g., a chassis ground/heat sink
150
, with the electrically conductive layer
130
in direct contact with the chassis ground
150
. In this manner, the electrically conductive material
130
acts as the common reference lead for the source terminals of transistors
110
and
120
, providing a current path from the respective transistor source terminals to chassis ground
150
.
In particular, the electrical currents from the respective transistor source terminals combine to form a common lead current (shown by arrows
190
), which must contend with the inherent (parasitic) resistance and inductive reactance in the electrically conductive layer
130
(common lead). As a result, the amplifier
100
will generally be unstable and suffer from isolation degradation between its gain stages due, in part, to the close proximity of the transistors
110
and
220
and the inherent resistive and inductive reactance characteristics of the electrically conductive layer
130
. Resistors
150
,
152
,
154
,
156
,
158
and
160
represent the inherent resistance, and inductors
151
,
153
,
155
,
157
,
159
and
161
the inductive reactance, respectively, of the common reference lead current path connecting the transistor source terminals to reference ground. The respective source terminals of transistors
110
and
120
are electrically connected to each other through the respective inherent resistors
152
,
154
,
156
and
159
, and inductors
153
,
155
,
157
and
159
in the common lead current path. Notably, the inductors are in parallel with the resistors and their inductive reactance is at least equal to the skin resistance of the conductive layer
130
at any given frequency.
Although the inherent resistive and inductive elements may represents very small values, they may cause significant performance variations because of the gains of the individual stages. Further, the resistive and inductive characteristics of the conductive layer can make the current flowing from the source terminal of one transistor flow towards the source terminal of the other transistor. As a result of these factors, a conventional multistage amplifier as illustrated in
FIGS. 1 and 2
, tends to be unstable and suffers gain s

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Stability enhanced multistage power amplifier does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Stability enhanced multistage power amplifier, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Stability enhanced multistage power amplifier will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3108036

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.