SRAM self-timed write stress test mode

Details SRAM self-timed write stress test mode SRAM self-timed write stress test mode

2005-02-01

2005-02-01

Le, N. (Department: 2858)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S765010, C324S1540PB

Reexamination Certificate

active

06850075

ABSTRACT:
An integrated circuit includes a test circuit that may be configured to generate a test signal having a predetermined pulse width in response to a control input. The test signal may track process corners of the integrated circuit and may be used to predict a failure of the integrated circuit.

REFERENCES:
patent: 4961053 (1990-10-01), Krug
patent: 5068547 (1991-11-01), Gascoyne
patent: 5161161 (1992-11-01), Malek-Khosravi et al.
patent: 5457400 (1995-10-01), Ahmad et al.
patent: 5838163 (1998-11-01), Rostoker et al.
patent: 6118138 (2000-09-01), Farnworth et al.
patent: 6181163 (2001-01-01), Agrawal et al.
patent: 6275962 (2001-08-01), Fuller et al.

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