SRAM memory cell protected against current or voltage spikes

Details SRAM memory cell protected against current or voltage spikes SRAM memory cell protected against current or voltage spikes

2011-01-18

2011-01-18

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Interconnection arrangements

C365S051000, C365S154000, C365S156000

Reexamination Certificate

active

07872894

ABSTRACT:
A memory cell is protected against current or voltage spikes. The cell includes a group of redundant data storage nodes for the storage of information in at least one pair of complementary nodes. The cell further includes circuitry for restoring information to its initial state following a current or voltage spike which modifies the information in one of the nodes of the pair using the information stored in the other node. The data storage nodes of each pair in the cell are implanted on opposite sides of an opposite conductivity type well from one another within a region of a substrate defining the boundaries of the memory cell.

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Preliminary French Search Report, FR 04 09781, dated May 30, 2005, 2 pages.

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