SRAM cell with no PN junction between driver and load transistor

Details SRAM cell with no PN junction between driver and load transistor SRAM cell with no PN junction between driver and load transistor

1997-03-20

1999-09-14

Tran, Minh Loan

Active solid-state devices (e.g., transistors, solid-state diode

Non-single crystal, or recrystallized, semiconductor...

Field effect device in non-single crystal, or...

257393, 257756, 257903, H01L 2976

Patent

active

059526785

ABSTRACT:
SRAM memory cells is provided with high resistance to soft error and no parasitic capacitance due to PN junction. SRAM memory cells comprises the load resister is a thin film transistor having a same conductive type as that of the driver transistor.

REFERENCES:
patent: 5331170 (1994-07-01), Hayashi
patent: 5592011 (1997-01-01), Yang
patent: 5635731 (1997-06-01), Ashida

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