SRAM cell

Details SRAM cell SRAM cell

2008-01-22

2008-01-22

McKinnon, Terrell L. (Department: 2809)

Semiconductor device manufacturing: process

Making passive device

C438S382000, C438S393000, C438S226000, C257S393000, C257SE27101, C257SE27098

Reexamination Certificate

active

07320923

ABSTRACT:
A method for forming a resistor of high value in a semiconductor substrate including forming a stack of a first insulating layer, a first conductive layer, a second insulating layer, and a third insulating layer, the third insulating layer being selectively etchable with respect to the second insulating layer; etching the stack, to expose the substrate and keep the stack in the form of a line; forming insulating spacers on the lateral walls of the line; performing an epitaxial growth of a single-crystal semiconductor on the substrate, on either side of the line; selectively removing the third insulating layer to partially expose the second insulating layer at a predetermined location; and depositing and etching a conductive material to fill the cavity formed by the previous removal of the third insulating layer.

REFERENCES:
patent: 4377819 (1983-03-01), Sakai et al.
patent: 5825684 (1998-10-01), Lee
patent: 5880497 (1999-03-01), Ikeda et al.
patent: 6130154 (2000-10-01), Yokoyama et al.
patent: 2004/0164360 (2004-08-01), Nishida et al.
patent: 09275150 (1997-10-01), None
French Search Report from French Patent Application 04/53012, filed Dec. 16, 2004.

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