SRAM array with improved cell stability

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

Reexamination Certificate

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C365S156000

Reexamination Certificate

active

10950928

ABSTRACT:
A CMOS static random access memory (SRAM) cell array, an integrated chip including the array and a method of accessing cells in the array with improved cell stability. Bit lines connected to half selected cells in the array are floated during cell accesses for improved cell stability.

REFERENCES:
patent: 6791864 (2004-09-01), Houston
patent: 6798682 (2004-09-01), Chuang et al.
patent: 6798688 (2004-09-01), Joshi
patent: 6868000 (2005-03-01), Chan et al.
patent: 6914803 (2005-07-01), Yamaoka et al.
patent: 6990038 (2006-01-01), Chan et al.
patent: 7006403 (2006-02-01), Joshi et al.

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