Squelch circuit with adjustable reference level

Details Squelch circuit with adjustable reference level Squelch circuit with adjustable reference level

2002-01-14

2004-08-10

Urban, Edward F. (Department: 2685)

Telecommunications

Receiver or analog modulated signal frequency converter

Squelch

C455S222000, C455S218000, C455S212000

Reexamination Certificate

active

06775527

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates in general to a squelch circuit, and more particularly, to a squelch circuit with an adjustable input level.
2. Description of the Related Art
A squelch circuit is a circuit designed to prevent input signal noise interference, and is used in the prior art to resolve the problems of too muchnoise from comparator. Referring to
FIG. 1
a
, the operation theory of a conventional comparator is shown. As shown in
FIG. 1
, when the conventional comparator receives a positive input voltage, a voltage of logic 1 is output. If the conventional comparator receives a negative input voltage, a voltage of logic 0 is output. A serious drawback of the conventional comparator is that an error output results when the input terminal is interfered by noise. That is, even when the conventional comparator does not receive a positive input voltage, a voltage of logic 1 may be output instead of the voltage of logic 0 which is supposed to be output. The output voltage of logic 1 is caused by noise instead of the real input voltage. Thus, once the comparator is interfered by noise, the output is unstable. To improve this situation, a squelch circuit has been designed.
Referring to
FIG. 1
b
, the operation theory of a conventional squelch circuit is illustrated. When a conventional squelch circuit receives an input voltage larger than the reference level V
THP
, a voltage of logic 1 is output. If the conventional squelch circuit receives an input voltage smaller than the level V
THP
, a voltage of logic 0 is output. Referring to
FIG. 1
c
, assuming that the input signal of the conventional squelch circuit has a waveform as shown, the conventional squelch circuit outputs a voltage of logic 1 at the portion larger the input level V
THP
, and outputs a voltage of logic 0 at the portion smaller than the input level V
THP
.
Referring to
FIG. 2
, a schematic circuit diagram of a conventional squelch circuit is shown. Such structure will achieve the above objective, that is, connecting the input positive signal to the input terminal INP, and connecting the input negative signal to the input terminal INN. When the input signal (V
INP
−V
INN
) is larger than the reference level V
THP
, the output terminal OUT of the comparator
10
outputs a voltage level of logic 1. In contrast, the output terminal OUT of the comparator
10
outputs a voltage level of logic 0 when the input signal is smaller than the reference level V
THP
. The above reference level V
THP
is defined as follows. The squelch circuit has an operation voltage of Vdd. The resistance of the resistors R
2
, R
1
, R
3
, R
4
, R
5
, R
6
, R
7
, R
8
is R
2
, R
1
, R
3
, R
4
, R
5
, R
6
, R
7
, R
8
, the voltage of the input terminal INP and INN is V
INP
and V
INN
, respectively, and the node voltage for nodes NP and PN is V
NP
and V
PN
, respectively. The input terminal of the comparator
10
receives the voltages of the nodes NP and PN to compare, and the compared result is output from the output terminal OUT. That is, the voltage difference V
INP
−V
INN
and the reference level V
THP
are compared. In addition, assuming that R
1
/(R
1
+R
2
)=R
7
/(R
7
+R
8
), R
1
=R
5
, R
2
=R
6
, R
3
=R
7
, R
4
=R
8
, the structure in the analytic drawing in
FIG. 2
has the following relations:
V
PN
=V
INP
−(V
dd
/2)(
R
7
/(
R
7
+R
8
))
V
NP
=V
INN
+(V
dd
/2)(
R
1
/(
R
1
+R
2
))
When V
PN
=V
NP
, V
THP
=V
INP
−V
INN
=(Vdd)/(R
1
/(R
1
+R
2
)). Therefore, the reference level V
THP
of the conventional squelch circuit is related to the operation voltage Vdd, R
1
, and R
2
. The reference level of the conventional squelch circuit is not programmable, and so, being easily affected by the operation voltage Vdd, the reference level V
THP
is not precise.
SUMMARY OF THE INVENTION
The present invention provides a squelch circuit with an adjustable reference level. The squelch circuit comprises a reference level comparator, which further includes a first, a second, a third and a fourth current input terminal, a first and a second input terminal and an output terminal. A first current source is coupled between the first current input terminal and an operation voltage. A second current source is coupled between the second current input terminal and the operation voltage. A third current source is coupled between the third current input terminal and a ground terminal. A fourth current source is coupled between the fourth current input terminal and the ground terminal. A bias generator is coupled to the first, second, third and fourth current input terminals to generate control signals according to a reference current and control bits, so that the first, second, third and fourth current sources generate the current, which adjusts the reference level.
Both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.


REFERENCES:
patent: 4186354 (1980-01-01), Page
patent: 4893349 (1990-01-01), Eastmond et al.
patent: 4991227 (1991-02-01), Kehler, Jr.
patent: 5142244 (1992-08-01), Glica et al.
patent: 5315549 (1994-05-01), Scherpenberg et al.
patent: 6070063 (2000-05-01), Yoshizawa et al.
patent: 6184726 (2001-02-01), Haeberli et al.
patent: 6486710 (2002-11-01), Simoni
patent: 2003/0001627 (2003-01-01), Simoni

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