Squelch circuit and methodology for a multi-level quantizer

Details Squelch circuit and methodology for a multi-level quantizer Squelch circuit and methodology for a multi-level quantizer

1997-11-05

2000-08-08

Tsang, Fan S.

Telecommunications

Receiver or analog modulated signal frequency converter

Squelch

455219, 455225, 4552422, 375260, 375264, 330310, 330311, 341126, 341158, 341159, 348405, H04B 110, H04L 702

Patent

active

061013765

ABSTRACT:
An improved squelch circuit and methodology for a multi-level quantizer employing one or more amplifiers to amplify an input signal at different gains. Comparators coupled to corresponding amplifiers or amplifier stages produce pulses based on comparing the amplified signals with a common reference potential. Digital delay lines coupled to the comparators repeatedly delay the pulses.

REFERENCES:
patent: 4630290 (1986-12-01), Kage
patent: 5303407 (1994-04-01), Juergensen et al.
patent: 5367162 (1994-11-01), Holland et al.
patent: 5450622 (1995-09-01), Vandegraaf
patent: 5481226 (1996-01-01), Parkes, Jr.
patent: 5517433 (1996-05-01), Morrison

Affiliated with

Also associated with

Rating

Squelch circuit and methodology for a multi-level quantizer does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Squelch circuit and methodology for a multi-level quantizer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Squelch circuit and methodology for a multi-level quantizer will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1158888