Squaring circuit for binary numbers

Details Squaring circuit for binary numbers Squaring circuit for binary numbers

1994-11-07

1997-05-13

Mai, Tan V.

Boots, shoes, and leggings

G06F 738

Patent

active

056298854

ABSTRACT:
A circuit for squaring a binary number X of n bits, x.sub.0 to x.sub.n-1, includes pre-processing circuits to form a group of all the products x.sub.i y.sub.j of the bits of number X, where i and j vary between 0 and n-1 such that i.ltoreq.j. The outputs of the pre-processing circuits provide words such that each word is formed by a succession, as complete as possible, of products selected among the products remaining from the group of products after forming the preceding word, each product x.sub.i y.sub.j of this succession being affected with a weight i+j+1 of the word if i is different from j, or with a weight 2i if i=j. Adders are connected to sum the words as the square of the number X.

REFERENCES:
patent: 3610906 (1971-10-01), Stampler
patent: 4817028 (1989-03-01), Masson
IBM Technical Disclosure Bulletin, vol. 34, No. 7B, Dec. 1991 New York, US, pp. 339-340, "Unit To Square A Number In Reduced Time And Area".

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