Squaring circuit bypass

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

377110, 307572, H03K 19094, H03K 5156, H03K 3017

Patent

active

044645864

ABSTRACT:
A digital signal bypass circuit including a two terminal clock input for supplying a clock input signal with a predetermined first frequency. A divide-by-two squaring circuit is also provided which is input for synchronously translating the clock input signal into an output signal having a frequency one-half of the predetermined first frequency. A bypass circuit is provided which is connected to the clock input and responsive to the clock input signal applied thereto, the bypass circuit being operative to disable the divide-by-two squaring circuit so that the output signal has a frequency equal to the predetermined first frequency.

REFERENCES:
patent: 3202837 (1965-08-01), Baracket
patent: 3548203 (1970-12-01), Basse et al.
patent: 3800233 (1974-03-01), Sauthier
patent: 4092604 (1978-05-01), Berney

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