Fishing – trapping – and vermin destroying
Patent
1987-12-24
1990-09-04
James, Andrew J.
Fishing, trapping, and vermin destroying
357 22, 437176, 437177, 437178, H01L 2978
Patent
active
049548522
ABSTRACT:
A method and resulting circuit structure (10) are disclosed for sputtering metallic silicide gates (18) on gallium arsenide integrated circuit structures. Silicon and metallic layers (14,15,14') are sputtered onto a gallium arsenide substrate (12) for stable high-temperature gate metallizations on VLSI structures.
REFERENCES:
IBM Technical Disclosure Bulletin, L. Berenbaum, "Metal Silicides for Schottky Barrier Diode Applications", vol. 22, No. 8A, 1/80, pp. 3206-3207.
Yokoyama, N. "A GaAs 1K Static RAM . . . " IEEE J. of Solid State Circuits, vol. SC-18, No. 5, Oct. 1983, pp. 520-524.
Ghandi, S. "VLSI Fabrication Principles" John Wiley & Sons, New York, 1983, pp. 12-14.
Ford Microelectronics, Inc.
James Andrew J.
Soltz David
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