Spreading code generation apparatus and CDMA receiver

Pulse or digital communications – Spread spectrum – Direct sequence

Reexamination Certificate

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Details

C375S150000, C370S355000

Reexamination Certificate

active

06836505

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a spreading code generation apparatus and CDMA receiver used in spread spectrum communications.
2. Description of the Related Art
According to a CDMA (Code Division Multiple Access) communication system, it is possible to increase reception power by receiving a plurality of arriving signals (delay signals) with different delays and combining these reception signals.
A CDMA receiver has a plurality of reception fingers corresponding to different delay signals.
Each reception finger has a spreading code (despreading code) generator capable of controlling timing of spreading code (despreading code) generation in accordance with the amount of delay of the corresponding delay signal.
FIG. 1
of the Unexamined Japanese Patent Publication No.HEI 11-74820 discloses a configuration that individually provides one spreading code generator for each of a plurality of reception fingers.
Adopting the configuration that individually provides one spreading code generator for each of a plurality of reception fingers will increase the volume of hardware and also increase the area occupied by an LSI chip. This will also increase power consumption of the LSI.
It is an object of the present invention to reduce the area occupied by the LSI chip and power consumption of the LSI by simplifying the circuit for generating a spreading code corresponding to each delay signal.
SUMMARY OF THE INVENTION
The spreading code generation apparatus of the present invention temporarily stores a spreading code string generated from one spreading code generator in memory (shift register or RAM). Then, after providing a necessary delay, the spreading code generation apparatus supplies the spreading code stored in memory to a corresponding correlator. This can reduce the number of spreading code generators and can also reduce power consumption of the circuit.
One aspect of the spreading code generation circuit of the present invention stores a spreading code string generated from one spreading code generator in a shift register. The shift register is configured in such away that data is output in parallel from each tap.
Then, the spreading code generation apparatus selects one of spreading codes with different delays output in parallel from memory based on synchronization acquisition information output from a searcher. This makes it possible to generate spreading codes with the phases adjusted to corresponding multi-paths.
Another aspect of the spreading code generation circuit of the present invention stores a spreading code string generated from one spreading code generator in RAM. Then, the spreading code generation circuit controls the timing of supplying read addresses to the RAM based on synchronization acquisition information output from a searcher. This makes it possible to generate spreading codes with phases adjusted to corresponding multi-paths.


REFERENCES:
patent: 5936999 (1999-08-01), Keskitalo
patent: 5940432 (1999-08-01), Saito et al.
patent: 5956367 (1999-09-01), Koo et al.
patent: 6373881 (2002-04-01), Mizuguchi et al.
patent: 6414984 (2002-07-01), St.ang.hle
patent: 6452959 (2002-09-01), McDonough
patent: 6463048 (2002-10-01), Garyantes
patent: 0963070 (1999-12-01), None
patent: 1071222 (2001-01-01), None
patent: 8-65264 (1996-03-01), None
patent: 11-74820 (1999-03-01), None
patent: 11252044 (1999-09-01), None
patent: 2000-41022 (2000-02-01), None
English Language Abstract of JP 11-74820.
English Language Abstract of JP 2000-41022.
English Language Abstract of JP 11-252044.
English Language Abstract of JP 8-65264.

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