Spread spectrum receiver

Pulse or digital communications – Spread spectrum – Direct sequence

Reexamination Certificate

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Details

C370S342000

Reexamination Certificate

active

06282234

ABSTRACT:

BACKGROUND OF THE INVENTION
(1) Field of the Invention
The present invention relates to a spread spectrum receiver in a CDMA (code division multiple access) system, and more specifically, relates to a spread spectrum receiver having an excellent interference immunity, by truing up the phase difference in the demodulated path data due to a plurality of base stations and a multipath, thereby enabling to utilize the data in a RAKE synthesis section.
(2) Description of the Prior Art
With the CDMA system, a “spread” processing is performed wherein a base band signal which has been subjected to a primary modulation on the transmission side is multiplied by spread codes different for each channel, to thereby send out the signal. On the receiver side, a “despread processing” is performed wherein the same spread codes as those of the transmission side are multiplied to the spectrum signal, to thereby take out the original primary signal modulation signal. The primary modulation signal is passed through a normal demodulation circuit, thereby the base band signal is reproduced. When the spread codes are different between the transmitter side and the receiver side, there is no correlation between them, hence any signal cannot be taken out. Therefore, with the CDMA system, it is possible to take out an intended channel from received signals in which a plurality of channels are mixed in the same frequency.
The land mobile communication is characterized in that the radio wave can reach to a relatively remote area, and can is easily transmitted even to the back side of obstacles such as buildings due to large diffraction effect, etc., therefore in many cases, it utilizes a frequency band of from 800 MHz to 2 GHz. However, since reflection and diffraction of the electromagnetic wave are caused due to the obstacles, a plurality of propagation paths (multipath) are formed. That is to say, since the transmission distances of the radio wave are different, a delay is caused due to the routes when the radio waves emitted from the same spot reach a certain spot. In this situation, at the time of demodulation, if the timing of despreading symbol synchronization is gradually shifted, a plurality of correlation peaks can be obtained.
According to the phase difference (delay time difference) appeared in the delay profile, despreading processes and DLLs (Delay Locked Loop) are operated respectively independently. By multiplying the obtained demodulation output by a proper coefficient to thereby add respective multipath input signals, excellent reception characteristics can be obtained. This is referred to as “RAKE synthesis”. The phase difference occurred here can be presumed from parameters such as cell radius or the like of the target communication system. It is necessary to perform the RAKE synthesis for the respective demodulation output, considering the phase difference up to the presumed range.
A conventional method of RAKE-synthesizing the demodulation output (path data) having a plurality of phase differences (delay time differences) caused by the multipath described above is disclosed in, for example, Japanese Patent Application Laid-Open Hei 10 No. 190528. With this method, as shown in
FIG. 1
, synchronous search is performed by a timing control circuit, to calculate the phase difference from the peak position in the path. Then, by adjusting a stage to take out the data, using a stage-variable type shift register, based on the phase difference information, the phase difference is absorbed.
FIG. 1
shows a three-finger type RAKE synthesis method having three sets of a code generator
114
, a corrector
115
and a synchronous detection circuit
116
. Signals received by an antenna
111
are amplified, frequency-converted and detected in a radio section
112
and converted to baseband signals. A phase difference in each path is determined from the correlation peak position by a path search section
113
, and a despreading code is generated by the code generator
114
, to thereby operate the corrector
115
at a timing indicated by the path search section
113
, hence the correlation output of each path can be obtained. Then, the results of each output detected by the synchronous detection circuit
116
are taken into a shift register
117
, then stages are set and delayed, considering the phase difference in each path indicated by the path search section
113
, to thereby true up the phase, thus enabling a synthesis by means of a RAKE synthesis circuit
118
.
With this spread spectrum receiver, the phase difference (delay time difference) and power (amplitude) change in each path, with timewise changes in the multipath propagation path. Corresponding the changes, it becomes necessary to true up the phase so that the RAKE synthesis becomes possible without causing any loss in the path data. However, with a construction using a DLL for demodulation, the demodulation outputs such as the path data and the frame synchronous signals have fluctuations for a portion of the system clock, hence there is a possibility that a fetch of the path data may be failed, with the shift register construction in the conventional example. This leads to a increase of an error rate. Moreover, with the shift register construction, if it is tried to correspond to the multipath changes as much as possible, the circuit size becomes large, causing a problem in that the power consumption increases.
SUMMARY OF THE INVENTION
With a view to solving the above problems, it is an object of the present invention to provide a spread spectrum receiver in a CDMA system which can improve the reception level without utilizing the result of path search, which can be made small and which can reduce the power consumption.
The present invention has been completed to attain the above-described object, and the gist thereof is as follows.
A first gist of the present invention is a spread spectrum receiver in a CDMA system comprising:
a radio section for detecting spread spectrum input signals and converting them to baseband signals;
a path search section for performing a path search with respect to the baseband signals to determine the phase difference in each path;
a DLL section for despreading and demodulating the baseband signals for each path, at a timing indicated by the path search section;
a timing adjusting section for truing up the phase of the demodulated signals from the DLL section with a predetermined timing and outputting the signals, respectively; and
a RAKE synthesis section for RAKE-synthesizing the signals from the timing adjusting section;
the timing adjusting section comprising:
a buffer section for storing and holding the signals from the DLL section based on the timing indicated by the path search section, and outputting signals in an address indicated by a read signal; and
a read signal control section for indicating an address and a timing by means of the read signal, so that the signals in each path held by the buffer section are output with the phase being trued up.
A second gist of the present invention resides in a spread spectrum receiver according to the gist one, wherein the buffer section consists of a SRAM.
A third gist of the present invention resides in a spread spectrum receiver according to the gist one, wherein the buffer section consists of a FIFO.
A fourth gist of the present invention resides in a spread spectrum receiver according to the gist one, wherein the read signal control section outputs the read signal which trues up the phase difference in each signal timewise, based on the signal from the DLL section serving as a reference.
A fifth gist of the present invention resides in a spread spectrum receiver according to the gist two, wherein the read signal control section outputs the read signal which trues up the phase difference in each signal timewise, based on the signal from the DLL section serving as a reference.
A sixth gist of the present invention resides in a spread spectrum receiver according to the gist three, wherein the read signal control section outputs the read signal which trues up th

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