Spread spectrum modulation technique for frequency synthesizers

Details Spread spectrum modulation technique for frequency synthesizers Spread spectrum modulation technique for frequency synthesizers

1998-09-08

2002-02-26

Le, Amanda T. (Department: 2634)

Pulse or digital communications

Spread spectrum

C375S376000, C331S011000, C327S105000

Reexamination Certificate

active

06351485

ABSTRACT:

TECHNICAL FIELD
This invention relates generally to phase locked loops for frequency synthesizers and more particularly to phase locked loops for frequency synthesizers which require a spread spectrum feature.
BACKGROUND ART
A frequency synthesizer that has a phase lock loop (PLL) uses a reference signal to generate a desired clock at generally higher frequencies. At these high frequencies, the clock causes electromagnetic interference (EMI) which disturbs proper operation of electronics devices nearby. To prevent disturbance, synthesizers are required to shield and isolate the clock. Depending on the peak amplitude of the clock, the shielding can be a significant additional cost for manufactures.
The higher the peak amplitude is, the worse the EMI. Thus, it is desirable to be able to reduce the peak amplitude while maintaining the high frequency. It has been determined that this can be accomplished by spreading the output clock frequency from the nominal frequency where the peak occurs to other frequencies which are just slightly above and below the nominal frequency.
The spectrum amplitude can be reduced without curtailing logic HIGH and LOW level by spreading the output clock frequency from the nominal frequency with an external reference frequency. In personal computer applications, microprocessor clock frequency is targeted to spread within −0.5% from nominal frequency with 30 kHz to 50 kHz signals. Such a spread spectrum clock has been very difficult to develop.
There are several ways the spread spectrum clocks have been implemented in the past. Some used a separate divider circuit to generate a constant modulation frequency such as 30 kHz to 50 kHz. Some multiplexed between two clock sources. Others modulated a control voltage, V
LF
, with a triangle wave. However, such clock sources had sub-optimal reductions in amplitude spectrum. Moreover, the frequency spreading would not be within the desired specification and vary over the process, and with changes in voltage and temperature.
While there has been some consideration given to developing digital solutions to the frequency spreading requirement, the difficulty of controlling such a digital solution and preventing the PLL from destabilizing has prevented such a solution.
Consequently, there exists a need for a spread spectrum modulation technique to precisely spread the clock frequency within specific range over the process and with changes in voltage and temperature without use of a constant reference frequency source.
DISCLOSURE OF THE INVENTION
The present invention provides a spread spectrum modulation technique which uses digital control logic to switch back and forth between two feedback divider ratios so that the PLL spreads output clock frequency between two limits determined by the ratios. The spread spectrum control logic can be integrated into any PLL synthesizer.
The present invention provides a technique which eliminates the need for complex modulation circuits.
The present invention further provides a technique which eliminates the need for triangle modulation frequency.
The present invention still further provides a technique which eliminates the need for a constant modulation frequency source.
The present invention still further provides for the elimination of a portion of the shielding and isolation required for non-spread spectrum high frequency clocks.


REFERENCES:
patent: 5610955 (1997-03-01), Bland
patent: 5872807 (1999-02-01), Booth et al.
patent: 6046646 (2000-04-01), Lo et al.

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