Spread spectrum clocking tolerant receivers

Details Spread spectrum clocking tolerant receivers Spread spectrum clocking tolerant receivers

2005-08-30

2005-08-30

Chin, Stephen (Department: 2634)

Pulse or digital communications

Synchronizers

Synchronizing the sampling time of digital data

C375S371000, C375S373000, C375S375000

Reexamination Certificate

active

06937679

ABSTRACT:
In some embodiments, the invention includes a system having a clock recovery circuitry to receive a data signal and a reference clock signal and in response thereto to produce an in phase clock signal which is in phase with the data signal and mirrors frequency changes in the data signal, wherein the data signal has embedded clock information and a varying frequency. The system also includes a receiving gate to receive the data signal and the in phase clock signal and to gate the data signal to produce a gated data signal in response to the in phase clock signal. Other embodiments are described and claimed.

REFERENCES:
patent: 5696800 (1997-12-01), Berger
patent: 5867542 (1999-02-01), Iwamatsu et al.
patent: 6057730 (2000-05-01), Yamamoto
patent: 6236697 (2001-05-01), Fang
patent: 6347128 (2002-02-01), Ransijn
patent: 0732829 (1996-09-01), None
patent: 0732829 (1999-09-01), None
patent: WO96/27943 (1996-09-01), None
Steve Bolger and Samer Omar Darwish, Use Spread-Spectrum Techniques to Reduce EMI, EDN Design Feature, May 21, 1998 issue, pp. 141, 142, 144, 146, 148 Copy of PCT Search Report. Mar. 25, 2003.

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