Spread spectrum clocking in fractional-N PLL

Details Spread spectrum clocking in fractional-N PLL Spread spectrum clocking in fractional-N PLL

2008-09-05

2010-06-15

Mis, David (Department: 2817)

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

C331S016000

Reexamination Certificate

active

07737791

ABSTRACT:
In applications that use fractional-N phase locked loops (PLLs), the use of spread spectrum clocking (SSC) to reduced electromagnetic interference (EMI) would be desirable, but conflicts can occur. Here, a circuit is provided that includes both fractional logic circuitry and spread spectrum logic circuitry. This logic circuitry operates in combination with a phase selector to generally ensure that the likelihood of conflicts (which can occur in conventional circuit) are reduced.

REFERENCES:
patent: 7043202 (2006-05-01), Ozawa et al.
patent: 7123101 (2006-10-01), Puma et al.
patent: 2005/0040893 (2005-02-01), Paist et al.
patent: 2005/0242851 (2005-11-01), Booth et al.
patent: 2007/0041486 (2007-02-01), Shin
patent: 102005050828 (2006-07-01), None

Affiliated with

Also associated with

Rating

Spread spectrum clocking in fractional-N PLL does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Spread spectrum clocking in fractional-N PLL, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Spread spectrum clocking in fractional-N PLL will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4235070