Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
1999-04-08
2001-05-01
Metjahic, Safet (Department: 2858)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S1540PB, C361S767000
Reexamination Certificate
active
06225816
ABSTRACT:
TECHNICAL FIELD
The present invention is generally related to a system and method for testing the operation of integrated and other circuits and, more particularly, is related to a system and method for testing circuits by probing dense pad arrays.
BACKGROUND OF THE INVENTION
Integrated circuits such as processors and other similar devices are operating at much greater speeds to perform an ever increasing number of operations each second. Many of these integrated circuits are placed on printed circuit boards or other similar structures and are in electrical communication with many different electrical components and other integrated circuits resident on the same printed circuit board. In order to facilitate communication between the integrated circuits and the several other electronic components, the integrated circuit contacts electrical conductors on a printed circuit board through pads that are often arranged in a dense grid or array on the printed circuit board.
Often times, it is necessary to test the operation of such new integrated circuits after they are fabricated either to test prototypes or to diagnose problems experienced with the integrated circuits. In particular, generally one or more of the pads in the array into which the integrated circuit is inserted are probed to access the signal thereon so that the signal can be transmitted to a logic analyzer or oscilloscope. The fact that the pins of the integrated circuits and corresponding pads on the printed circuit board are arranged in a dense array make such testing difficult to accomplish in light of the high frequency operation of such integrated circuits.
To explain further, a typical printed circuit board includes several groups of signal conductors that run between various components on the board. When a probe conductor is joined to one of the pads, a very small capacitance between the probe conductor and the signal conductors on the order of picofarads presents an undesirable load impedance on the pads. In particular, at low frequencies, this impedance is acceptably high. However, at very high signal frequencies, on the order of hundreds of megahertz, the impedance presented by such a capacitance will drop, resulting in extraneous loading on the conductors between the integrated circuits.
In addition, a similar small capacitance may exist between the probe conductor and the remaining pads, or aggressor conductors in the pad array. At high frequencies, these capacitances present a low impedance which results in cross-talk between the aggressor conductors and the probe conductor.
This extraneous loading and cross-talk results in distortion of the signal on the pins of the integrated circuit that causes error to the data represented by the transmitted signals. Consequently, the ability to test the integrated circuit is hampered by the use of the probe itself.
SUMMARY OF THE INVENTION
The present invention provides a system and method for probing target pads in a dense pad array while, first, minimizing distortion of a target signal on the probed pads due to the probe load on the target pads and, second, minimizing distortion of the probe output signal due to cross-talk between the probe tip and aggressor conductors in the dense pad array. In one embodiment, a probe tip arrangement is provided comprising a pad located in a dense pad array and a first probe tip resistor having first and second ends, the first end being coupled to the pad. The first probe tip resistor is positioned directly adjacent to the pad as closely as manufacturing processes will allow.
The probe tip arrangement further includes an access transmission line coupled to the second end of the first probe tip resistor and extending outside of the dense pad array to a second probe tip resistor. The second probe tip resistor is, in turn, coupled to an electrical connector which in turn is coupled to a logic analyzer or oscilloscope to test the signal on the respective pad of the pad array. The dense pad array may be a ball grid array, a pin grid array, an array of vias on a printed circuit board, a number of closely aligned conductors on a printed circuit board or multi-chip module.
The present invention can also be viewed as providing a method for probing a pad in a dense pad array. In this regard, the method can be broadly summarized by the following steps: providing a first end of a first probe tip resistor to a pad in the dense pad array, the first probe tip resistor being directly adjacent to the pad; providing an access transmission line coupled to a second end of the first probe tip resistor and extending outside of the dense pad array; providing a second probe tip resistor coupled to the access transmission line outside of the dense pad array; coupling an external analysis device to the second probe tip resistor; and, analyzing a signal obtained from the pad using the external analysis device.
The present invention has numerous advantages, a few of which are delineated hereafter as merely examples. For instance, the use of the first and second probe tip resistors reduces the incidental loading of the target pads by isolating the target pad from the probe circuitry while at the same time diminishing the effect of cross-talk from nearby aggressor conductors into the probe circuitry. In addition, the present invention is simple in design, user friendly, robust and reliable in operation, efficient in operation, and easily implemented for mass commercial production.
Other features and advantages of the present invention will become apparent to one with skill in the art upon examination of the following drawings and detailed description. It is intended that all such additional features and advantages be included herein within the scope of the present invention.
REFERENCES:
patent: 5373231 (1994-12-01), Boll et al.
patent: 5554940 (1996-09-01), Hubacher
patent: 5891745 (1999-04-01), Dunaway et al.
patent: 6081429 (2000-06-01), Barrett
Draving Steven D
Kerley John C
Agilent Technologie,s Inc.
Metjahic Safet
Nguyen Jimmy
LandOfFree
Split resistor probe and method does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Split resistor probe and method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Split resistor probe and method will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2437934