Split phase loop

Details Split phase loop Split phase loop

1985-08-13

1987-04-14

Heyman, John S.

Electrical transmission or interconnection systems

With nonswitching means responsive to external nonelectrical...

Temperature responsive

307269, 307480, 307511, 307601, 307602, 307605, H03K 513, H03K 5159

Patent

active

046581618

ABSTRACT:
An apparatus and method are described for generating a plurality of clock edges from a reference clock signal. The clock edges which are generated are locked in phase with the reference clock signal. The edges may be at any integral or non-integral multiple of the reference clock frequency.

REFERENCES:
patent: 3553484 (1971-01-01), Gassmann
patent: 4090096 (1978-05-01), Nagami
patent: 4463440 (1984-07-01), Nishiura et al.
patent: 4489342 (1984-12-01), Gollinger et al.
patent: 4496861 (1985-01-01), Bazes
patent: 4504749 (1985-03-01), Yoshida

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