Split drive clock buffer

Details Split drive clock buffer Split drive clock buffer

1995-09-08

1997-03-11

Wambach, Margaret Rose

Miscellaneous active electrical nonlinear devices, circuits, and

Gating

Accelerating switching

327108, 327112, 327379, H03K 1716

Patent

active

056105487

ABSTRACT:
A system and method for increasing clock edge transition speed and edge phase accuracy. A split clock buffer provides separate controls of a pull-up transistor and a pull-down transistor. The buffer is off (high impedance) between clock edge transitions. Clock edge transition speed is improved by avoiding the transient condition of a conventional clock buffer where both of the pull-up and pull-down transistors are both on during clock edge transition.

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