Split-channel high electron mobility transistor (HEMT) device

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Bipolar transistor

Reexamination Certificate

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Details

C257S192000, C257S194000, C257S200000, C257S201000, C257S205000, C257S190000, C257S189000

Reexamination Certificate

active

06835969

ABSTRACT:

TECHNICAL FIELD
This invention relates to high electron mobility transistor (HEMT) devices, and more particularly to HEMT devices having split-channels.
BACKGROUND
As is known in the art, one type of semiconductor device is a High Electron Mobility Transistor (HEMT). One type of HEMT is a metamorphic HEMT (MHEMT) such as that shown in the cross-section in FIG.
1
. The device is constructed by growing crystal compounds containing In, Ga, Al, and As on GaAs wafers. In these devices, electrons are conducted into and out of the device's semiconductor layers by means of ohmic metal contacts. Upon entering the semiconductor layers below the source ohmic metal, electrons are routed to a channel layer consisting of InGaAs. Once in the channel layer, electrons are confined there by virtue of an InAlAs Schottky layer and an InAlAs barrier layer until they again reach the drain ohmic contact. Electrons have an affinity for the channel layer because the electronic properties of the InGaAs and InAlAs are such that electrons are at a lower potential energy when they reside in the lnGaAs channel layer. InGaAs cap layers combined with a high-temperature bake, i.e. alloy of the ohmic metal, serve to aid the formation of low-resistance ohmic contacts which aid the entry and exit of electrons to and from the channel layer.
Devices similar to the MHEMT in form and function can also be constructed on InP substrates. The resulting InP HEMTs have similar electrical properties to MHEMTs but are more restricted in terms of material composition design.
As is also known in the art, MHEMTs and similar devices are typically used to amplify electrical signals at frequencies up to approximately 150 GHz. Present challenges include obtaining high efficiency, power, and gain above 60 GHz along with low cost, and design flexibility that allows trade-offs to be made between power density and gain. In order to reduce cost, these devices utilize metamorphic growth technology described in a paper entitled “Molecular beam epitaxial growth and device performance of metamorphic high electron mobility transistor structures fabricated on GaAs substrates' by W. E. Hoke, P. J. Lemonias, J. J. Mosca, P. S. Lyman, A. Torabi, P. F. Marsh, R. A. McTaggart, S. M. Lardizabal, and K. Hetzler, published in the Journal of Vacuum Science and Technology B 17, 1131 (1999). This process allows the fabrication of high indium content channel layers as needed to obtain acceptably high gain above 60 GHz.
Normally, InP substrates must be used to grow devices having channel layers with indium contents near 45-60% as required for acceptable frequency response at mm-wave frequencies. However, the metamorphic growth technology allows the growth of such high indium devices on GaAs substrates, thus reducing wafer breakage and improving manufacturability. Additionally, metamorphic technology allows one to vary the channel indium content upward, for low-power applications, to obtain low noise and high gain at high frequencies or downward to obtain higher power output while sacrificing noise figure as would be done for power amplifier applications.
Power-added efficiency (PAE), is defined as:
PAE
=
P
RFout
-
P
RFin
P
DC
=
P
RFout

(
1
-
1
G
)
P
DC
where P
DC
is the DC power drawn by the amplifier, P
RFout
and P
RFin
are the amplifier RF output and RF input signal powers respectively, and
G
=
P
RFout
P
RFin
is the amplifier power gain. Alternatively, PAE can be defined as:
PAE
=
δ

(
G
-
1
)
G
where the drain efficiency &dgr; is defined as:
δ
=
P
RFout
P
DC
.
In order to maximize PAE, it is important to maintain a high gain, well over unity. PAE is typically quoted as a percentage obtained by multiplying the above PAE by 100.
FIG. 2
shows an RF load line (
11
) overlaying the MHEMT's family of IV curves and the RF power output can be found from:
P
RFout
=
(
V
max
-
V
min
)

(
I
peak
-
I
min
)
8
.
The RF voltage swing, V
max
−V
min
and current swing, I
peak
−I
min
are limited by the MHEMT's family of curves. Limitations on any of the four V
max
, I
min
, V
min
, and/or I
peak
will limit RF power output. V
min
and I
peak
are constrained to V
min
>0 and I
peak
<I
dpeak
as shown in
FIG. 2
, by the device's on resistance, R
o
n. In MHEMTs, V
max
is usually limited by the requirement to set the drain RF load and/or the DC drain bias voltage so that V
ds
always remains below that which induces a fast, destructive burnout process. It appears that this burnout mechanism is related to the rate of impact ionization in the channel which is proportional to I
ds
as well as V
ds
. Therefore the value of V
ds
resulting in burnout, i.e. V
burn
, generally falls as I
ds
increases. Additionally, depending on the device, I
min
can sometimes be nonzero due to the inability to pinch off the MHEMT drain current, I
ds
at a high drain voltage V
ds
. However, for devices containing high channel indium contents such as MHEMTs discussed here, the above burnout mechanism is usually the limiting factor of V
max
.
Technology limitations in ohmic contacts as well as trade-offs inherent in doping dictate a minimum practical value of R
on
. A nonzero R
on
limits the drain efficiency &dgr; because it reduces the RF current and voltage swing, and hence P
RFout
without a proportional reduction in P
DC
. Once the ohmic contacts are optimized, the only way left to further improve &dgr; is to increase the value of V
burn
by reducing impact ionization. For a given V
ds
and device structure, impact ionization can be reduced by increasing the bandgap of the material by reducing the channel layer indium content.
Established PHEMT technologies use approximately 19% indium content in the channel and give approximately 2 dB gain at maximum P
RFout
at 95 GHz whereas a 53% indium channel MHEMT has shown 5 dB gain at 95 GHz at maximum P
RFout
Gain is a significant factor in PAE. For example, if the PHEMT and MHEMT had the same drain efficiency &dgr;, then the MHEMT's PAE would twice that of the PHEMT. For instance, at the low gains encountered in 95 GHz PHEMTs, PAE is 0.376 whereas the MHEMT's PAE is 0.688. Furthermore, PHEMT amplifiers show typically 95 GHz PAEs in the range of 13% whereas InP and MHEMT PAEs are 20-24% at 95 GHz. Therefore, it is important to find a device structure that will allow a good compromise between low impact ionization and high gain at high frequencies.
As is also known in the art, conventional InP and metamorphic HEMTs (MHEMTs) use a single channel layer as shown in FIG.
1
. Here, electrons flow in a homogenous sheet, i.e. the channel layer which has a uniform composition. While such devices obtain record low noise figures at high frequencies, the high indium content of their channel layers results in power limitations such as high gate current and low burnout voltage threshold (V
burn
) due to the high levels of impact ionization at high values of drain voltage, V
ds
. The solution might appear to be one of simply lowering the indium content of the channel. However, reduced indium content will decrease electron mobility and electron velocity. The result will be reduced gain and efficiency at high frequencies.
As is also known in the art, compromises are possible whereby the indium content is decreased to 40-50% from the 60% channel indium content as used in MHEMTs designed for low noise and small signal applications. One technique used to provide a compromise involves splitting the channel layer into upper and lower channel layer as shown in FIG.
3
. In most cases, the upper channel layer consists of In
x
Ga
1-x
As where 0.53<x<0.65 and the lower channel layer is InP. In some cases a portion of the InP channel is doped. Here, the high electron mobility characteristics of the upper channel enables excellent ohmic contacts and high electron velocity in the low electric field region, between gate and source, as shown in FIG.
3
. Below the upper channel layer the lower InP channel layer is optimized for high electron velocity transport for high electric fiel

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