SPICE optimized for arrays

Details SPICE optimized for arrays SPICE optimized for arrays

2008-01-29

2008-01-29

Dinh, Son (Department: 2824)

Static information storage and retrieval

Interconnection arrangements

C365S201000, C714S718000

Reexamination Certificate

active

07324363

ABSTRACT:
A memory array can be optimized for SPICE simulation by modeling the memory array as a collection of boundary elements that track the cell states of memory cells connected to a particular array terminal. By maintaining a cell state distribution for each boundary element, the simulation behavior at the array terminal associated with that boundary element can be accurately determined by modeling each unique cell state, multiplying the results by the corresponding quantities from the cell state distribution, and then adding the results to obtain final values for the array terminal. This allows accurate simulation results to be achieved without needing to simulate each cell independently. Furthermore, by removing any references to unoccupied cell states (e.g., by removing such states from the cell state distribution and/or eliminating model equations for such states), the memory and cpu usage requirements during the simulation can be minimized.

REFERENCES:
patent: 6577992 (2003-06-01), Tcherniaev et al.
patent: 6611934 (2003-08-01), Whetsel, Jr.
patent: 6982903 (2006-01-01), Bertin et al.
patent: 7151695 (2006-12-01), Choy et al.

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