Speeding up the response time of the direct multiplex control tr

Details Speeding up the response time of the direct multiplex control tr Speeding up the response time of the direct multiplex control tr

1983-06-13

1987-05-12

Williams, Archie E.

Boots, shoes, and leggings

G06F 300, G06F 1300

Patent

active

046654810

ABSTRACT:
A microprogrammed data processing system includes a central processing unit (CPU), a main memory and a number of mass storage controllers. A block of information is transferred between main memory and one of the mass storage controllers during data multiplex control (DMC) cycles. The main memory stores 2 data bytes in each word location. An input/output RAM stores channel number signals for identifying mass storage controllers. An I/O microprocessor addresses the I/O RAM to read the channel number signals onto the system bus, and a mass storage controller coupled to the system bus responds to the channel number signals to generate a read/write signal. The system responds to a request signal, the read/write signal and a signal indicative of a left or right bit of an addressed location in main memory to generate a plurality of data request signals. A read only memory is addressed in response to the data request signals to read out a plurality of microprograms for processing the data.

REFERENCES:
patent: 3633169 (1972-01-01), Bickford
patent: 4032898 (1977-06-01), Grigoletti
patent: 4292668 (1981-09-01), Miller et al.
patent: 4293908 (1981-10-01), Bradley et al.
patent: 4313160 (1982-01-01), Kaufman et al.
patent: 4484271 (1984-11-01), Miu et al.

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