Speeding up the power-up procedure for low power RAM

Details Speeding up the power-up procedure for low power RAM Speeding up the power-up procedure for low power RAM

2006-02-21

2006-02-21

Mai, Son (Department: 2827)

Static information storage and retrieval

Powering

Conservation of power

C365S226000

Reexamination Certificate

active

07002870

ABSTRACT:
An internal power system for a low power memory chip is described that provides a large capacity internal power source during chip power up and during an active state whereby memory operations are carried out. A memory chip standby state allows reduced chip power where the large capacity power source is turned off, and the memory chip internal voltages are provided by a small capacity power source. Switching between the standby and active states of the low power memory chip is accomplished by turning on and off a standby signal. The internal and external chip voltages are monitored during chip power up to insure that predetermined voltage levels have been reached before turning off the large capacity power source and placing the chip into a standby state.

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