Speed-up circuit for switched power transistor

Electric power conversion systems – Current conversion – With condition responsive means to control the output...

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Details

363126, 323289, 307280, 307300, H02P 1326

Patent

active

046672818

ABSTRACT:
A circuit is provided to speed up switching of a capacitively coupled power transistor driven with a signal provided from a pulse width modulator. The speed-up circuit is provided across a buffer amplifier which is in series circuit between the pulse width modulator and the coupling capacitor. The speed-up circuit includes a time delay circuit which is activated when the output of the amplifier goes low. The delay circuit is coupled to actuate a clamp circuit at a predetermined interval after activation. The clamp circuit is connected to the input of the amplifier and, upon actuation, pulls up the voltage at the input of the amplifier so that it is at a level intermediate the extreme values of the pulse width modulator output signal. In a preferred embodiment the timer is a series RC charging circuit and the clamp is a transistor with its base connected to the junction between the capacitor and the resistor. The collector of the transistor is coupled to the input of the amplifier and its emitter is connected to a voltage source through a zener diode.

REFERENCES:
patent: 3733540 (1973-05-01), Hawkins
patent: 4220987 (1980-09-01), Rao et al.
patent: 4312029 (1982-01-01), Zellmer
patent: 4437148 (1984-03-01), Suranyi

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