Speed-up circuit for NPN bipolar transistors

Details Speed-up circuit for NPN bipolar transistors Speed-up circuit for NPN bipolar transistors

1988-07-27

1990-04-03

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307455, 307456, 357 44, H01L 2702, H03K 19088

Patent

active

049143204

ABSTRACT:
A speed-up circuit is employed in a semiconductor chip of the type that includes a P-type substrate with a plurality of NPN transistors integrated into a surface thereof. Those transistors include a first NPN transistor having a base which receives a control signal, a collector coupled to a voltage bus, and an emitter which drives a first resistor plus a base of a second NPN transistor plus a small parasitic capacitance. The second NPN transistor has a collector coupled to a voltage bus, and an emitter which drives a second resistor plus a larger parasitic capacitance. And, the speed-up circuit is comprised of: a PNP transistor having an emitter coupled to the large capacitance, a base coupled to a tap on the first resistor, and a collector coupled to the substrate. This PNP transistor has an emitter and a base which consists of doped regions in the substrate that respectively are shaped the same as the base and collector of each NPN transistor, and the collector of the PNP transistor is the entire substrate below the NPN transistors.

REFERENCES:
patent: 4668879 (1987-05-01), Dansky et al.

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