Speed and memory optimized interleaving

Coded data generation or conversion – Digital code to digital code converters – To or from interleaved format

Reexamination Certificate

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Details

C341S050000

Reexamination Certificate

active

07091889

ABSTRACT:
This invention relates to a method for interleaving, according to an interleaving scheme, an input sequence comprising K bits into an interleaved sequence, comprising the steps of (a) storing the input sequence in a first memory means, (b) generating first indices of N succeeding bits of the interleaved sequence, wherein 1 m(F) N m(F) K, (c) converting. according to an inverse of said interleaving scheme, said first indices into second indices indicative of the positions where said N succeeding bits of the interleaved sequence are stored in said first memory means, and (d) reading out said N succeeding bits from said positions in said first memory means, thereby generating at least part of said interleaved sequence.

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European Patent Office, International Search Report for PCT/EP02/10073, dated Feb. 20, 2003.

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